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aoptcpu.pas
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* fixes peephole optimizer problems with -O3 on x86-64
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2012-05-13 19:19:04 +00:00 |
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aoptcpub.pas
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aoptcpud.pas
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cgcpu.pas
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* x86_64-win64: SEH finalization procedures have frame pointer set to RBP but since r25389 they save registers relative to RSP. Fixed offsets for .seh_savereg/.seh_savexmm directives.
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2013-09-04 15:31:55 +00:00 |
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cpubase.inc
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* optimize mov/lea
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2013-11-01 19:01:14 +00:00 |
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cpuelf.pas
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x86_64 internal ELF linker:
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2013-07-29 08:34:00 +00:00 |
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cpuinfo.pas
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* basic avx support for floating point operations (use -Cfavx to activate)
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2013-06-14 20:03:01 +00:00 |
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cpunode.pas
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* adapt max_linear_list on x86-64 as well
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2013-07-07 20:01:10 +00:00 |
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cpupara.pas
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* add a tdef to each parameter location and set it for all target
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2013-06-02 10:24:02 +00:00 |
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cpupi.pas
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* x86_64-win64: don't allocate outgoing parameter area in nostackframe procedures, it fails compilation if range/overflow/etc checking is enabled (which always sets pi_do_call) due to check introduced in r22677.
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2013-07-26 10:24:31 +00:00 |
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cputarg.pas
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* Split most CPU-specific code from ogelf.pas into newly created cpuelf.pas units in CPU subdirectories.
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2012-08-23 11:49:49 +00:00 |
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hlcgcpu.pas
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nx64add.pas
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* support 32 bit operations on x86-64 in the code generator
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2013-11-01 19:01:02 +00:00 |
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nx64cal.pas
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nx64cnv.pas
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* moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for
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2012-05-13 12:33:10 +00:00 |
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nx64flw.pas
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* specify AT_DATA in all references to the tobjectdef.vmt_mangledname symbol.
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2013-10-15 18:56:27 +00:00 |
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nx64inl.pas
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nx64mat.pas
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* support 32 bit operations on x86-64 in the code generator
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2013-11-01 19:01:02 +00:00 |
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nx64set.pas
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* adapt max_linear_list on x86-64 as well
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2013-07-07 20:01:10 +00:00 |
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r8664ari.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664att.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664con.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664dwrf.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664int.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664iri.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664nor.inc
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* merged avx support in inline assembler developed by Torsten Grundke
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2012-10-06 19:47:18 +00:00 |
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r8664num.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664ot.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664rni.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664sri.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664stab.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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r8664std.inc
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* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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2013-10-03 08:08:04 +00:00 |
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rax64att.pas
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rax64int.pas
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rgcpu.pas
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win64unw.pas
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x8664ats.inc
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+ added the NEC V20/V30 instructions
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2013-10-11 21:27:56 +00:00 |
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x8664att.inc
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+ added the NEC V20/V30 instructions
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2013-10-11 21:27:56 +00:00 |
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x8664int.inc
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+ added the NEC V20/V30 instructions
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2013-10-11 21:27:56 +00:00 |
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x8664nop.inc
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- rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction,
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2013-10-18 23:26:58 +00:00 |
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x8664op.inc
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+ added the NEC V20/V30 instructions
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2013-10-11 21:27:56 +00:00 |
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x8664pro.inc
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+ added the NEC V20/V30 instructions
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2013-10-11 21:27:56 +00:00 |
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x8664tab.inc
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+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics
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2013-11-01 19:01:39 +00:00 |
