Jonas Maebe c1e327c8c4 * insert register allocation/deallocation information for the exception ... handling code (g_exception_reason_load() now automatically allocates the cpu register that it loads). This fixes the bug reported in http://lists.freepascal.org/lists/fpc-devel/2009-May/016773.html on i386 with -O2) git-svn-id: trunk@13105 -		2009-05-06 19:11:54 +00:00
..
ag386nsm.pas	+ added {$modeswitch objectivec1}/-Mobjectivec1 mode switch to enable	2009-03-08 18:40:32 +00:00
aopt386.pas
cgcpu.pas	* insert register allocation/deallocation information for the exception	2009-05-06 19:11:54 +00:00
cpubase.inc
cpuinfo.pas
cpunode.pas	+ added {$modeswitch objectivec1}/-Mobjectivec1 mode switch to enable	2009-03-08 18:40:32 +00:00
cpupara.pas	- removed obsolete USECMOV define	2008-08-24 12:46:42 +00:00
cpupi.pas
cputarg.pas
csopt386.pas	* optbase empty skeleton removed with two dependancies. Duplicate unit name caused problems.	2009-05-03 21:31:33 +00:00
daopt386.pas	* optbase empty skeleton removed with two dependancies. Duplicate unit name caused problems.	2009-05-03 21:31:33 +00:00
i386att.inc
i386atts.inc
i386int.inc
i386nop.inc	* fixes assembling of mov ax,<mem16>	2008-11-09 10:24:59 +00:00
i386op.inc
i386prop.inc
i386tab.inc	* fixed assembler tables for sse4 instructions, resolves #13186	2009-02-24 20:07:11 +00:00
n386add.pas	* implementation of 32x32->64 multiplication for i386 based on patch	2008-11-06 21:03:10 +00:00
n386cal.pas
n386inl.pas
n386mat.pas
n386mem.pas	* the compiler now explicitly keeps track of the minimally guaranteed	2009-02-08 13:00:24 +00:00
n386set.pas
popt386.pas	* the compiler now explicitly keeps track of the minimally guaranteed	2009-02-08 13:00:24 +00:00
r386ari.inc
r386att.inc
r386con.inc
r386dwrf.inc
r386int.inc
r386iri.inc
r386nasm.inc
r386nor.inc
r386nri.inc
r386num.inc
r386op.inc
r386ot.inc
r386rni.inc
r386sri.inc
r386stab.inc
r386std.inc
ra386att.pas
ra386int.pas
rgcpu.pas
rropt386.pas	* the compiler now explicitly keeps track of the minimally guaranteed	2009-02-08 13:00:24 +00:00