florian 5c67fcc43f + change always floating point divisions into multiplications if they are a power of two, ... this is an exact operation so it is always allowed * change only divisions by normal numbers into multiplications git-svn-id: trunk@29085 -		2014-11-16 20:47:38 +00:00
..
aoptcpu.pas	+ enable jump optimizer for i8086	2013-05-01 13:54:13 +00:00
aoptcpub.pas	+ enable jump optimizer for i8086	2013-05-01 13:54:13 +00:00
aoptcpud.pas	+ enable jump optimizer for i8086	2013-05-01 13:54:13 +00:00
cgcpu.pas	+ support i8086 far data memory models in tcg8086.g_intf_wrapper	2014-05-03 14:17:54 +00:00
cpubase.inc	Implement support for saving and restoring address registers.	2013-10-05 21:43:42 +00:00
cpuinfo.pas	+ change always floating point divisions into multiplications if they are a power of two,	2014-11-16 20:47:38 +00:00
cpunode.pas	+ generate the stack segment for i8086 far data memory models from within fpc	2014-05-27 23:29:50 +00:00
cpupara.pas	* fixed the passing of extended floating type parameters on i8086 for	2014-05-01 16:45:49 +00:00
cpupi.pas	- rm ti8086procinfo.allocate_got_register as it isn't used on the i8086	2013-04-14 14:35:51 +00:00
cputarg.pas
hlcgcpu.pas	+ added support for nested procvars in the i8086 far data memory models	2014-05-22 23:44:09 +00:00
i8086att.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i8086atts.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i8086int.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i8086nop.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
i8086op.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i8086prop.inc	* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.	2014-06-11 22:31:40 +00:00
i8086tab.inc	+ prove of concept how FMA4 could be supported in inline assembler	2014-03-20 21:25:38 +00:00
n8086add.pas	* fixed DFA warnings for i8086	2014-08-20 15:49:27 +00:00
n8086cal.pas	* don't push cs in ti8086callnode.extra_interrupt_code in the far code memory	2014-04-21 00:56:51 +00:00
n8086cnv.pas	* converted tcgtypeconvnode.second_nil_to_methodprocvar to the high level code	2014-04-28 01:05:14 +00:00
n8086con.pas	* moved x86-specific tpointerdef functionality to architecture-specific	2014-03-30 21:04:36 +00:00
n8086inl.pas	* is_farpointer and is_hugepointer moved from defutil to symcpu	2014-08-06 20:32:41 +00:00
n8086ld.pas	* fixed nested access to parent local variables in i8086 far data memory models	2014-03-30 17:50:35 +00:00
n8086mat.pas	* fixed DFA warnings for i8086	2014-08-20 15:49:27 +00:00
n8086mem.pas	+ implemented correct [] indexing of huge pointers	2014-08-07 09:11:21 +00:00
n8086tcon.pas	* is_farpointer and is_hugepointer moved from defutil to symcpu	2014-08-06 20:32:41 +00:00
n8086util.pas	+ added heapmax support to the $M directive on i8086-msdos. It is currently	2014-06-23 20:17:17 +00:00
r8086ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086nasm.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086nor.inc	* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc	2013-04-12 12:06:28 +00:00
r8086nri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8086stab.inc	* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc	2013-04-12 12:06:28 +00:00
r8086std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
ra8086att.pas	* changed the default i8086 asmmode to Intel	2013-09-21 18:43:34 +00:00
ra8086int.pas	* changed the default i8086 asmmode to Intel	2013-09-21 18:43:34 +00:00
rgcpu.pas	+ set ref.segment to NR_SS for all temps/localvars on i8086. This allows the	2014-05-01 21:18:47 +00:00
symcpu.pas	* reimplemented r28329 in a different way, as suggested by Jonas	2014-08-07 19:36:52 +00:00
tgcpu.pas	+ set ref.segment to NR_SS for all temps/localvars on i8086. This allows the	2014-05-01 21:18:47 +00:00