florian c961c72c30 * tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350 ... git-svn-id: trunk@35430 -		2017-02-12 16:05:13 +00:00
..
aasmcpu.pas	* specify the def of assembler level symbols defined via	2016-07-20 20:52:59 +00:00
agarmgas.pas	* restructured the the TExternalAssembler constructors so that the	2016-11-09 19:51:20 +00:00
aoptcpu.pas	* don't conditionalise BL on ARM, because it may have to be converted to	2016-03-06 17:44:08 +00:00
aoptcpub.pas	* ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions.	2014-09-22 16:18:16 +00:00
aoptcpud.pas
armatt.inc	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armatts.inc	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armins.dat	* fix assembling of vfnm*	2016-03-06 13:33:29 +00:00
armnop.inc	Add most pre-UAL VFP instruction forms.	2015-03-14 14:59:13 +00:00
armop.inc	Add support for writeback in RFE and SRS instructions.	2015-12-26 23:53:11 +00:00
armreg.dat	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
armtab.inc	* fix assembling of vfnm*	2016-03-06 13:33:29 +00:00
cgcpu.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cpubase.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cpuelf.pas	AROS: added arm-aros target to compiler and fpcmake	2016-11-06 10:51:45 +00:00
cpuinfo.pas	Added more Nordic Semi controllers. Created a new unit for NRF52x controllers with a more precise register naming following Nordic SDK conventions.	2017-01-10 20:30:20 +00:00
cpunode.pas	* automatically generate necessary indirect symbols when a new assembler	2016-07-20 20:53:03 +00:00
cpupara.pas	+ hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715	2016-03-06 15:47:31 +00:00
cpupi.pas	* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can	2016-12-16 22:41:21 +00:00
cputarg.pas	AROS: added arm-aros target to compiler and fpcmake	2016-11-06 10:51:45 +00:00
hlcgcpu.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
itcpugas.pas	* remove unused units from uses statements	2013-01-03 23:07:09 +00:00
narmadd.pas	+ enable use of vfma and friends on arm when doing fastmath optimizations	2016-03-06 13:33:27 +00:00
narmcal.pas	syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed	2016-12-02 09:29:09 +00:00
narmcnv.pas	* tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350	2017-02-12 16:05:13 +00:00
narmcon.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
narminl.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
narmmat.pas	* fix VFPv4 support	2016-03-06 13:33:16 +00:00
narmmem.pas	* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe	2015-02-23 22:56:00 +00:00
narmset.pas	+ added volatility information to all memory references	2016-11-27 18:17:37 +00:00
pp.lpi.template
raarm.pas	o patch by Jeppe Johansen to fix mantis #17472:	2010-12-24 15:54:39 +00:00
raarmgas.pas	* reverted r35424, wasn't ready for commit yet	2017-02-11 21:21:44 +00:00
rarmcon.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmdwa.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmnor.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmnum.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmrni.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmsri.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmsta.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmstd.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rarmsup.inc	Added some APSR register bitmask definitions.	2014-12-12 22:23:44 +00:00
rgcpu.pas	* offset of vstr/vld is limited to +/- 1020, take care of this during spilling	2017-02-04 18:42:02 +00:00
symcpu.pas	arm: arm-aros syscall support	2016-11-06 14:31:42 +00:00