fpc/compiler/x86
2016-03-01 00:40:35 +00:00
..
aasmcpu.pas * changed output parameter of process_ea_ref() from "out" to "var", as it is 2016-01-18 22:20:26 +00:00
agx86att.pas Added x86_64-embedded target. Patch from Benjamin Rosseaux 2016-02-14 10:57:00 +00:00
agx86int.pas + added new asm directive 'asd_cpu' (specifies the CPU's instruction set) in the 2016-02-25 21:47:13 +00:00
agx86nsm.pas * fixed indentation in TX86NasmAssembler.WriteHeader 2016-03-01 00:40:35 +00:00
aoptx86.pas * popt386 uses now also all routines of aoptx86 2015-09-29 19:31:33 +00:00
cga.pas
cgx86.pas * x86: Don't save/restore integer registers that are volatile per calling convention of current procedure. It implies that nothing will be saved for procedures with OLDFPCCALL, FAR16 and PASCAL and calling conventions. OLDFPCCALL restores behavior that was in effect before r25224. 2015-11-27 05:48:49 +00:00
cpubase.pas * Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471. 2016-02-09 16:48:32 +00:00
hlcgx86.pas * synchronized with privatetrunk till r30095 2015-03-05 20:32:15 +00:00
itcpugas.pas * Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471. 2016-02-09 16:48:32 +00:00
itx86int.pas
ni86mem.pas
nx86add.pas * converted register_maybe_adjust_setbase() to the high level code generator 2015-12-05 18:03:37 +00:00
nx86cal.pas + also allow x86 call ref for references that contain only non-imaginary registers (no infinite spilling problems there either) 2015-11-11 16:33:48 +00:00
nx86cnv.pas * replaced current_procinfo.currtrue/falselabel with storing the true/false 2015-08-27 18:28:57 +00:00
nx86con.pas
nx86inl.pas * converted register_maybe_adjust_setbase() to the high level code generator 2015-12-05 18:03:37 +00:00
nx86ld.pas * fixed threadvar support on linux/i386 and android/i386 after r31639 2015-09-13 07:46:31 +00:00
nx86mat.pas * fixed compilation of 8086 compiler. 2015-09-17 16:30:02 +00:00
nx86mem.pas * generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe 2015-02-23 22:56:00 +00:00
nx86set.pas * converted register_maybe_adjust_setbase() to the high level code generator 2015-12-05 18:03:37 +00:00
rax86.pas * allow 32-bit operand sizes in the i8086 version of Tx86Operand.SetSize, so 2016-01-06 18:06:34 +00:00
rax86att.pas - x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability. 2014-11-16 16:37:26 +00:00
rax86int.pas * Replaced hacks with resetting 'c' to zero and decreasing inputpointer by boolean parameter to skipcomment and skipoldtpcomment. This parameter specifies whether first character of comment should be read. 2016-01-03 17:07:15 +00:00
rgx86.pas * synchronised with r28168 of trunk 2014-07-05 21:30:28 +00:00
symi86.pas * changed {$ifdef x86} code in defcmp into virtual methods 2015-10-28 18:06:27 +00:00
symx86.pas * adaptation for symx86 to r32340 2015-11-15 23:15:43 +00:00
x86ins.dat * the SEGFS and SEGGS prefixes are 386+ 2016-01-11 15:51:40 +00:00
x86reg.dat