fpc/compiler/avr
florian cd41312a8f * fixes not(<qwordbool>) on arm
* fixes not(<(q/l)wordbool>) on avr

git-svn-id: trunk@38263 -
2018-02-16 22:38:35 +00:00
..
aasmcpu.pas * based on a patch by Christo Crause: in finalizeavrcode, ignore assembler breq statements taking an absolute value, resolves #32109 2018-01-31 18:38:33 +00:00
agavrgas.pas * LDD/STD need always an offset, resolves #33086 2018-01-28 21:06:13 +00:00
aoptcpu.pas * apply MovOpMov2Op also to inc and dec 2017-11-26 15:28:44 +00:00
aoptcpub.pas Added some peephole optimizations, and fixed generic unconditional jump optimizations, for AVR. 2015-06-13 12:25:11 +00:00
aoptcpud.pas
avrreg.dat * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ccpuinnr.inc + implemented some AVR specific intrinsics 2017-11-01 16:33:34 +00:00
cgcpu.pas * do not destroy flags while clearing R1, resolves #33170 2018-02-14 19:28:33 +00:00
cpubase.pas * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved 2017-09-11 14:53:06 +00:00
cpuinfo.pas Changed subarch of at90pwm161 2017-12-29 11:30:35 +00:00
cpunode.pas + implemented some AVR specific intrinsics 2017-11-01 16:33:34 +00:00
cpupara.pas * support marking defs created via the getreusable*() class methods as 2015-11-04 20:46:18 +00:00
cpupi.pas * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 2016-12-16 22:41:21 +00:00
cputarg.pas
hlcgcpu.pas
itcpugas.pas + xch instruction for avr 2016-11-19 19:21:09 +00:00
navradd.pas * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved 2017-09-11 14:53:06 +00:00
navrcnv.pas * named class properly 2015-04-09 20:36:47 +00:00
navrinl.pas + implemented some AVR specific intrinsics 2017-11-01 16:33:34 +00:00
navrmat.pas * fixes not(<qwordbool>) on arm 2018-02-16 22:38:35 +00:00
navrmem.pas * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler) 2017-07-28 15:54:03 +00:00
navrutil.pas * rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR 2017-05-23 19:58:39 +00:00
raavr.pas changes to fix #32043 2017-10-06 21:07:19 +00:00
raavrgas.pas * patch by Christo Crause to resolve #33098: AVR - LDS assembler instruction with absolute address gives compiler error 2018-01-30 20:22:42 +00:00
ravrcon.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrdwa.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrnor.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrnum.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrrni.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsri.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsta.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrstd.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsup.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
rgcpu.pas * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved 2017-09-11 14:53:06 +00:00
symcpu.pas o fixes handling of iso i/o parameters/program parameters: 2015-05-01 20:58:31 +00:00