fpc/compiler/avr
florian cda78c398f + AVR: cputype cpu_avrtiny
git-svn-id: trunk@43984 -
(cherry picked from commit aaa6ae5770)
2021-10-24 12:40:37 +02:00
..
aasmcpu.pas * patch by Christo Crause: more descriptive error message when BRxx destination out of reach 2018-02-25 15:31:17 +00:00
agavrgas.pas * LDD/STD need always an offset, resolves #33086 2018-01-28 21:06:13 +00:00
aoptcpu.pas - Add mov optimization for STS instruction. 2021-10-24 12:40:36 +02:00
aoptcpub.pas
aoptcpud.pas
avrreg.dat * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ccpuinnr.inc - Adds intrinsics to save/restore SREG when disabling interrupts. 2021-10-24 12:40:36 +02:00
cgcpu.pas * AVR: fixes pushing and handling of stack passed parameters 2021-10-24 12:40:37 +02:00
cpubase.pas * AVR: fixes pushing and handling of stack passed parameters 2021-10-24 12:40:37 +02:00
cpuinfo.pas + AVR: cputype cpu_avrtiny 2021-10-24 12:40:37 +02:00
cpunode.pas + implemented some AVR specific intrinsics 2017-11-01 16:33:34 +00:00
cpupara.pas * AVR: fixes pushing and handling of stack passed parameters 2021-10-24 12:40:37 +02:00
cpupi.pas * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 2016-12-16 22:41:21 +00:00
cputarg.pas
hlcgcpu.pas
itcpugas.pas + xch instruction for avr 2016-11-19 19:21:09 +00:00
navradd.pas * avr: help the compiler with constant loading to avoid ie 200309041 2021-10-24 12:40:37 +02:00
navrcnv.pas
navrinl.pas AVR: Add optimizations for sign testing, and a better Abs() implementation. 2021-10-24 12:40:36 +02:00
navrmat.pas * avr directly encodes constant shifts of 64 bit values 2021-10-24 12:40:37 +02:00
navrmem.pas * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler) 2017-07-28 15:54:03 +00:00
navrutil.pas * rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR 2017-05-23 19:58:39 +00:00
raavr.pas * max_operands needs only to be 2 on avr 2021-10-24 12:40:36 +02:00
raavrgas.pas * keep track of the temp position separately from the offset in references, 2018-04-22 17:03:16 +00:00
ravrcon.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrdwa.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrnor.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrnum.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrrni.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsri.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsta.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrstd.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
ravrsup.inc * keep the names of X, Y and Z in assembler files, fixes issue #32150 2017-07-23 19:24:45 +00:00
rgcpu.pas avr: Fixed some inconsistencies. 2021-10-24 12:40:36 +02:00
symcpu.pas
tripletcpu.pas * merged macOS/AArch64 support + revisions these changes depended on 2020-09-15 19:40:36 +00:00