..
aasmcpu.pas
* specify the def of assembler level symbols defined via
2016-07-20 20:52:59 +00:00
agarmgas.pas
Add support for writeback in RFE and SRS instructions.
2015-12-26 23:53:11 +00:00
aoptcpu.pas
* don't conditionalise BL on ARM, because it may have to be converted to
2016-03-06 17:44:08 +00:00
aoptcpub.pas
* ARM: instructions do modify the base register of pre/postindexed references. Report this fact in spilling_get_operation_type_ref and RegModifiedByInstruction functions.
2014-09-22 16:18:16 +00:00
aoptcpuc.pas
aoptcpud.pas
armatt.inc
Add support for writeback in RFE and SRS instructions.
2015-12-26 23:53:11 +00:00
armatts.inc
Add support for writeback in RFE and SRS instructions.
2015-12-26 23:53:11 +00:00
armins.dat
* fix assembling of vfnm*
2016-03-06 13:33:29 +00:00
armnop.inc
Add most pre-UAL VFP instruction forms.
2015-03-14 14:59:13 +00:00
armop.inc
Add support for writeback in RFE and SRS instructions.
2015-12-26 23:53:11 +00:00
armreg.dat
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
armtab.inc
* fix assembling of vfnm*
2016-03-06 13:33:29 +00:00
cgcpu.pas
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
2016-08-05 07:09:16 +00:00
cpubase.pas
* S1..S15 do not need to be marked as volatile as they are sub-registers of double size registers
2016-03-06 13:33:26 +00:00
cpuelf.pas
Make relocation type more precise compared to output of gas.
2016-01-05 07:23:20 +00:00
cpuinfo.pas
Added support for NRF52832 controllers.
2016-07-22 10:01:10 +00:00
cpunode.pas
* automatically generate necessary indirect symbols when a new assembler
2016-07-20 20:53:03 +00:00
cpupara.pas
+ hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715
2016-03-06 15:47:31 +00:00
cpupi.pas
* fix VFPv4 support
2016-03-06 13:33:16 +00:00
cputarg.pas
hlcgcpu.pas
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
2016-08-05 07:09:16 +00:00
itcpugas.pas
narmadd.pas
+ enable use of vfma and friends on arm when doing fastmath optimizations
2016-03-06 13:33:27 +00:00
narmcal.pas
+ hardfloat directive (arm only): use hard float calling conventions regardless of the abi, resolves #29715
2016-03-06 15:47:31 +00:00
narmcnv.pas
* fix VFPv4 support
2016-03-06 13:33:16 +00:00
narmcon.pas
* grouped all tai_real* types into a single tai_realconst type,
2014-07-01 16:29:58 +00:00
narminl.pas
* Removed unused vars.
2016-03-21 09:21:24 +00:00
narmmat.pas
* fix VFPv4 support
2016-03-06 13:33:16 +00:00
narmmem.pas
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
2015-02-23 22:56:00 +00:00
narmset.pas
* converted register_maybe_adjust_setbase() to the high level code generator
2015-12-05 18:03:37 +00:00
pp.lpi.template
raarm.pas
raarmgas.pas
- removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
2016-08-05 07:09:16 +00:00
rarmcon.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmdwa.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmnor.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmnum.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmrni.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmsri.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmsta.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmstd.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rarmsup.inc
Added some APSR register bitmask definitions.
2014-12-12 22:23:44 +00:00
rgcpu.pas
* never allocate odd numbered single-sized registers
2016-03-06 13:33:24 +00:00
symcpu.pas
o fixes handling of iso i/o parameters/program parameters:
2015-05-01 20:58:31 +00:00
aa1be3276f