sergei 1ee9373fa6 * Changed function create_pd into method of ttryfinallynode, so it can be reused for Win32 SEH and, in the future, for DWARF-based exception handling on other targets. ... * Additional two minor changes: reset po_delphi_nested_cc on result, so it is independent of current {$modeswitch nestedprocvar} state, and removed call to alloc_proc_symbol (which belongs to pass 2). git-svn-id: trunk@26222 -		2013-12-12 08:38:06 +00:00
..
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	* Emit everything to the same asmlist (fixing copy-paste error).	2013-12-06 07:10:39 +00:00
cpubase.inc	* optimize mov/lea	2013-11-01 19:01:14 +00:00
cpuelf.pas	x86_64 internal ELF linker:	2013-07-29 08:34:00 +00:00
cpuinfo.pas	* basic avx support for floating point operations (use -Cfavx to activate)	2013-06-14 20:03:01 +00:00
cpunode.pas	* adapt max_linear_list on x86-64 as well	2013-07-07 20:01:10 +00:00
cpupara.pas	* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables	2013-12-01 17:02:08 +00:00
cpupi.pas	* x86_64-win64: don't allocate outgoing parameter area in nostackframe procedures, it fails compilation if range/overflow/etc checking is enabled (which always sets pi_do_call) due to check introduced in r22677.	2013-07-26 10:24:31 +00:00
cputarg.pas
hlcgcpu.pas
nx64add.pas	* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables	2013-12-01 17:02:08 +00:00
nx64cal.pas
nx64cnv.pas
nx64flw.pas	* Changed function create_pd into method of ttryfinallynode, so it can be reused for Win32 SEH and, in the future, for DWARF-based exception handling on other targets.	2013-12-12 08:38:06 +00:00
nx64inl.pas
nx64mat.pas	* support 32 bit operations on x86-64 in the code generator	2013-11-01 19:01:02 +00:00
nx64set.pas	* adapt max_linear_list on x86-64 as well	2013-07-07 20:01:10 +00:00
r8664ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664nor.inc
r8664num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664stab.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r8664std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
rax64att.pas
rax64int.pas
rgcpu.pas
win64unw.pas
x8664ats.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
x8664att.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
x8664int.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
x8664nop.inc	- rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction,	2013-10-18 23:26:58 +00:00
x8664op.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
x8664pro.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
x8664tab.inc	+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics	2013-11-01 19:01:39 +00:00