+ RTL support:
o VFP exceptions are disabled by default on Darwin,
because they cause kernel panics on iPhoneOS 2.2.1 at least
o all denormals are truncated to 0 on Darwin, because disabling
that also causes kernel panics on iPhoneOS 2.2.1 (probably
because otherwise denormals can also cause exceptions)
* set softfloat rounding mode correctly for non-wince/darwin/vfp
targets
+ compiler support: only half the number of single precision
registers is available due to limitations of the register
allocator
+ added a number of comments about why the stackframe on ARM is
set up the way it is by the compiler
+ added regtype and subregtype info to regsets, because they're
also used for VFP registers (+ support in assembler reader)
+ various generic support routines for dealing with floating point
values located in integer registers that have to be transferred to
mm registers (needed for VFP)
* renamed use_sse() to use_vectorfpu() and also use it for
ARM/vfp support
o only superficially tested for Linux (compiler compiled with -Cpvfpv6
-Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
the fpu exception handler still needs to be implemented), Darwin has
been tested more thoroughly
+ added ARMv6 cpu type and made it default for Darwin/ARM
+ ARMv6+ implementations of atomic operations using ldrex/strex
* don't use r9 on Darwin/ARM, as it's reserved under certain
circumstances (don't know yet which ones)
* changed C-test object files for ARM/Darwin to ARMv6 versions
* check in assembler reader that regsets are not empty, because
instructions with a regset operand have undefined behaviour in that
case
* fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
int64->single type conversion
* fixed constant pool locations in case 64 bit constants are generated,
and/or when vfp instructions with limited reach are present
WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
code with -Cparmv6 (or higher), or you will get crashes. The reason is
that storing/restoring multiple VFP registers must happen using
different instructions on pre/post-ARMv6.
git-svn-id: trunk@14317 -
This directory contains the sources of the Free Pascal Compiler
If you want to compile/modify the compiler, please read first the
programmers manual.
To recompile the compiler, you can use the batch files :
+ mppc386.bat if you want to build a cross compiler from i386 to m68k
+ mppcsparc if you want to build a cross compiler from i386 to SPARC
or
Use the make utility as following
make OS_TARGET="compiler OS target" \
CPU_TARGET="compiler CPU target" \
FPCCPUOPT="Optimization level" \
PP="compiler used to compile FPC" \
COMPILER_OPTIONS="Options passed to compiler" \
If an option is omitted, then target CPU/OS will be same as current CPU/OS
Possibles targets are : linux go32v2 win32 os2 freebsd beos netbsd amiga haiku
atari sunos qnx netware openbsd wdosx palmos macos macosx emx
Possible compiler switches (* marks a currently required switch):
-----------------------------------------------------------------
GDB* support of the GNU Debugger
I386 generate a compiler for the Intel i386+
x86_64 generate a compiler for the AMD x86-64 architecture
M68K generate a compiler for the M68000
SPARC generate a compiler for SPARC
POWERPC generate a compiler for the PowerPC
VIS generate a compile for the VIS
DEBUG version with debug code is generated
EXTDEBUG some extra debug code is executed
SUPPORT_MMX only i386: releases the compiler switch
MMX which allows the compiler to generate
MMX instructions
EXTERN_MSG Don't compile the msgfiles in the compiler, always
use external messagefiles, default for TP
NOAG386INT no Intel Assembler output
NOAG386NSM no NASM output
NOAG386BIN leaves out the binary writer, default for TP
NORA386DIR No direct i386 assembler reader
TEST_GENERIC Test Generic version of code generator
(uses generic RTL calls)
-----------------------------------------------------------------
cpuflags The target processor has status flags (on by default)
cpufpemu The target compiler will also support emitting software
floating point operations
cpu64bitaddr The targets use a 64-bit address space (pointers and
the default integer type are 64 bit)
cpu64bitalu The target cpu has 64-bit registers available (unless
cpu64bitaddr is also defined, pointers and default
integer type remain 32 bit, but the cpu can perform
64 bit calculations directly without needing helpers)
-----------------------------------------------------------------
Required switches for a i386 compiler be compiled by Free Pascal Compiler:
GDB;I386
to build a compiler to SPARC target using a Win32/i386 you just use :
make CPU_TARGET=SPARC
d1538ab023