sergei a28d6a84a7 + m68k, a_load_const_reg: use MOV3Q if applicable for data registers as well, since it allows spilling replacement of destination. ... + a_load_const_ref: use CLR and MOV3Q if possible. * a_cmp_reg_reg_label: force size to 32 bits for ISA_A and ISA_A+ targets. + support for stack frames larger than 32767 bytes. git-svn-id: trunk@28298 -		2014-08-02 12:46:34 +00:00
..
aasmcpu.pas	* m68k: initial support for ROL/ROR operations, defining 'cpurox' for CPU target can actually enable them. However it cannot be done outright because these instructions do not exits on Coldfire, and internal processing of RoX,Sar,BsX, etc. can not yet be switched depending on CPU subtype.	2014-06-29 17:49:30 +00:00
ag68kgas.pas
aoptcpu.pas	m68k: very early optimizer implementation experiments	2014-06-06 07:38:50 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	+ m68k, a_load_const_reg: use MOV3Q if applicable for data registers as well, since it allows spilling replacement of destination.	2014-08-02 12:46:34 +00:00
cpubase.pas	* m68k: fixed/completed the inverse_cond function.	2014-06-25 05:23:30 +00:00
cpuinfo.pas	fixed comment, no functional changes	2014-03-24 16:53:29 +00:00
cpunode.pas	m68k: cleaned up and fixed cgcpu/fixref for coldfire at least; also enabled n68kmem node, so addressing with scaling is generated now	2014-06-21 21:36:48 +00:00
cpupara.pas	* m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk.	2014-07-08 19:08:56 +00:00
cpupi.pas
cputarg.pas	m68k: very early optimizer implementation experiments	2014-06-06 07:38:50 +00:00
hlcgcpu.pas
itcpugas.pas
m68kreg.dat	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
n68kadd.pas	* m68k: further improved code generation for comparison nodes, support LOC_REFERENCE for 32-bit compares and omit low dword, when possible, for 64-bit ones.	2014-08-02 12:37:40 +00:00
n68kcal.pas	* m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk.	2014-07-08 19:08:56 +00:00
n68kcnv.pas
n68kmat.pas	- removed unused variables	2014-07-31 18:35:55 +00:00
n68kmem.pas	m68k: tweaks and fixes in n68kmem. the node is still disabled, needs further fixes in cgcpu/fixref to work properly	2014-06-20 11:49:38 +00:00
r68kcon.inc	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
r68kgas.inc	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
r68kgri.inc	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
r68knor.inc
r68knum.inc
r68krni.inc
r68ksri.inc	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
r68ksta.inc
r68kstd.inc	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
r68ksup.inc	instead of supporting SP only, have register A7 defined, and have SP as an alias	2014-04-13 21:02:16 +00:00
ra68k.pas	m68k/ra68k.pas: fixed some multi level comment warnings, so it now compiles with warnings on	2014-05-04 22:21:24 +00:00
ra68kmot.pas	* m68k: Fixed damage caused by r27573 and r28177:	2014-07-08 15:04:54 +00:00
rgcpu.pas	* m68k: don't do replace spilling if spilltemp.offset exceeds 16 bits on Coldfire targets.	2014-08-02 12:33:32 +00:00
symcpu.pas	Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym".	2014-04-11 14:30:59 +00:00