fpc/compiler/x86
2013-10-28 16:40:42 +00:00
..
aasmcpu.pas + added the NEC V20/V30 instructions 2013-10-11 21:27:56 +00:00
agx86att.pas
agx86int.pas
agx86nsm.pas * put the i8086-msdos dwarf debug sections in USE32 class=DWARF segments because 2013-10-27 20:28:43 +00:00
cga.pas
cgx86.pas * in tcgx86.make_simple_ref, on the i8086, emit 'mov es, reg', instead of 2013-10-06 19:52:38 +00:00
cpubase.pas
hlcgx86.pas
itcpugas.pas
itx86int.pas
nx86add.pas
nx86cal.pas
nx86cnv.pas
nx86con.pas
nx86inl.pas * tx86inlinenode.second_popcnt: use emit_ref_reg instead of appending instruction directly, this provides proper PIC handling of the reference. emit_reg_reg part is not strictly necessary, but done for consistency. 2013-10-28 16:40:42 +00:00
nx86mat.pas
nx86mem.pas
nx86set.pas
rax86.pas
rax86att.pas
rax86int.pas
rgx86.pas
x86ins.dat - rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction, 2013-10-18 23:26:58 +00:00
x86reg.dat * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 2013-10-03 08:08:04 +00:00