fpc/compiler/sparc
2015-04-04 14:29:16 +00:00
..
aasmcpu.pas
aoptcpu.pas * SPARC peephole: check that result of GetNextInstructionUsingReg is actually an instruction, because GetNextInstruction can stop at a label. Resolves #26798. 2014-09-28 22:18:59 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas + added tasmlist parameter to getintparaloc() (needed for llvm) 2015-04-04 14:29:16 +00:00
cpubase.pas * SPARC: cleaned up and actualized TAsmCond (stuff copy-pasted from x86 removed, conditions for unordered floating-point comparisons added). Fixes Mantis #9362 on this target. 2014-04-17 14:15:45 +00:00
cpuelf.pas Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 2014-12-14 16:28:35 +00:00
cpugas.pas Handle asmextraopt in powerpc, mips and sparc assemblers 2014-01-21 00:19:17 +00:00
cpuinfo.pas + change always floating point divisions into multiplications if they are a power of two, 2014-11-16 20:47:38 +00:00
cpunode.pas + support overriding tdef/tsym methods with target-specific functionality: 2014-03-29 22:31:55 +00:00
cpupara.pas * synchronised with trunk up till r26975 2014-03-06 21:36:58 +00:00
cpupi.pas * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. 2013-12-27 19:53:38 +00:00
cputarg.pas
hlcgcpu.pas * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 2014-08-19 20:22:54 +00:00
itcpugas.pas
ncpuadd.pas * fix GetResFlags DFA optimizer warning on Sparc and AVR too 2014-08-20 13:52:28 +00:00
ncpucall.pas * SPARC: UNIMP instruction has 22-bit "opcode", not 12-bit. 2014-04-17 14:08:33 +00:00
ncpucnv.pas * renamed getdatalabel() to getglobaldatalabel 2015-03-27 21:25:34 +00:00
ncpuinln.pas * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 2014-03-10 09:01:05 +00:00
ncpumat.pas * SPARC: cleaned up and actualized TAsmCond (stuff copy-pasted from x86 removed, conditions for unordered floating-point comparisons added). Fixes Mantis #9362 on this target. 2014-04-17 14:15:45 +00:00
ncpuset.pas * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). 2014-03-10 23:02:05 +00:00
opcode.inc + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00
racpu.pas
racpugas.pas * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 2013-12-27 06:45:49 +00:00
rgcpu.pas * synchronised with trunk up till r26975 2014-03-06 21:36:58 +00:00
rspcon.inc
rspdwrf.inc
rspnor.inc
rspnum.inc
rsprni.inc
rspsri.inc
rspstab.inc
rspstd.inc
rspsup.inc
spreg.dat
strinst.inc + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00
symcpu.pas Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 2014-04-11 14:30:59 +00:00