sergei db72b8d7fd * TCGMips.a_loadfpu_reg_cgpara: temps of type Double need 8-byte alignment, according to description of sdcX/ldcX instructions. Using TCGSize2Size to specify alignment is somewhat weird, but it is being used in other CPU back-ends and looks working. ... git-svn-id: trunk@23146 -		2012-12-15 08:47:11 +00:00
..
aasmcpu.pas
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
cgcpu.pas	* TCGMips.a_loadfpu_reg_cgpara: temps of type Double need 8-byte alignment, according to description of sdcX/ldcX instructions. Using TCGSize2Size to specify alignment is somewhat weird, but it is being used in other CPU back-ends and looks working.	2012-12-15 08:47:11 +00:00
cpubase.pas	Use TRegNameTable instead of array[tregisterindex] of string[10]	2012-10-22 10:23:21 +00:00
cpugas.pas	* typo fixed, patch by Mark Morgan Lloyd	2012-12-03 21:55:09 +00:00
cpuinfo.pas	Add arch and abi values for mips cpu	2012-10-16 09:57:24 +00:00
cpunode.pas	Remove more TABs in sources	2012-09-06 08:11:59 +00:00
cpupara.pas	Set register_used boolean only for calleeside	2012-09-06 08:11:15 +00:00
cpupi.pas	handle po_nostackframe for calc_stack_size	2012-10-18 09:44:11 +00:00
cputarg.pas	Add Dwarf debug info generation by default for mips cpu	2012-10-01 14:23:14 +00:00
hlcgcpu.pas	Remove more TABs in sources	2012-09-06 08:11:59 +00:00
itcpugas.pas
mipsreg.dat
ncpuadd.pas
ncpucall.pas	Remove more TABs in sources	2012-09-06 08:11:59 +00:00
ncpucnv.pas	Remove more TABs in sources	2012-09-06 08:11:59 +00:00
ncpuinln.pas
ncpuld.pas
ncpumat.pas	Fix tw22326 for mips CPU	2012-09-24 22:28:54 +00:00
ncpuset.pas
opcode.inc
racpugas.pas	Remove more TABs in sources	2012-09-06 08:11:59 +00:00
rgcpu.pas
rmipscon.inc
rmipsdwf.inc
rmipsgas.inc
rmipsgri.inc
rmipsgss.inc
rmipsnor.inc
rmipsnum.inc
rmipsrni.inc
rmipssri.inc
rmipssta.inc
rmipsstd.inc
rmipssup.inc
strinst.inc