..
a64att.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
a64atts.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
a64ins.dat
* added some missing instructions and aliases, reordered them according
2015-02-23 22:48:24 +00:00
a64nop.inc
a64op.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
a64reg.dat
* fixed debug register values for vector registers
2015-02-23 22:54:15 +00:00
a64tab.inc
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
2015-05-14 14:42:12 +00:00
aasmcpu.pas
* Removed unused local vars.
2018-11-02 18:44:29 +00:00
agcpugas.pas
* Register external gas assembler for aarch64-android and x86_64-android.
2018-10-18 11:48:27 +00:00
aoptcpu.pas
* Removed unused local vars.
2018-11-02 18:44:29 +00:00
aoptcpub.pas
- get rid of MaxOps, it is redundant with max_operands
2018-11-02 21:32:29 +00:00
aoptcpud.pas
cgcpu.pas
* Removed unused local vars.
2018-11-02 18:44:29 +00:00
cpubase.pas
* support OS_32/OS_64 in AArch64 cgsize2subreg() for MM registers (can happen
2018-12-16 20:44:24 +00:00
cpuinfo.pas
- removed unused constants
2017-03-26 13:06:34 +00:00
cpunode.pas
* automatically generate necessary indirect symbols when a new assembler
2016-07-20 20:53:03 +00:00
cpupara.pas
* pass dynamic array parameters of cdecl routines by value on AArch64
2018-12-16 20:44:35 +00:00
cpupi.pas
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
2016-12-16 22:41:21 +00:00
cputarg.pas
+ Added support for the aarch64-android target.
2018-10-06 09:33:09 +00:00
hlcgcpu.pas
* when optimising subsetreg moves for aarch64, take into account the fact
2018-12-09 14:46:52 +00:00
itcpugas.pas
ncpuadd.pas
* force constants into a registers in the 32x32->64 optimized case
2015-02-28 22:31:03 +00:00
ncpucnv.pas
* Removed unused local vars.
2018-11-02 18:44:29 +00:00
ncpuinl.pas
* Removed unused local vars.
2018-11-02 18:44:29 +00:00
ncpumat.pas
* set pi_do_call for AArch64 mod/div nodes, as they call FPC_DIVBYZERO
2015-02-28 22:30:57 +00:00
ncpumem.pas
* keep track of the temp position separately from the offset in references,
2018-04-22 17:03:16 +00:00
ncpuset.pas
* keep track of the temp position separately from the offset in references,
2018-04-22 17:03:16 +00:00
ra64con.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64dwa.inc
* fixed debug register values for vector registers
2015-02-23 22:54:15 +00:00
ra64nor.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64num.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64rni.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64sri.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64sta.inc
* fixed debug register values for vector registers
2015-02-23 22:54:15 +00:00
ra64std.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
ra64sup.inc
+ FPCR, FPSR and TPIDR registers
2015-02-23 22:50:44 +00:00
racpu.pas
+ Aarch64 assembler reader
2015-02-23 22:52:36 +00:00
racpugas.pas
* Removed unused local vars.
2018-11-02 18:44:29 +00:00
rgcpu.pas
* keep track of the temp position separately from the offset in references,
2018-04-22 17:03:16 +00:00
symcpu.pas
o fixes handling of iso i/o parameters/program parameters:
2015-05-01 20:58:31 +00:00