mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-05-29 15:42:34 +02:00

fixes a couple of arm-embedded stuff, adds some controllers, start of fpv4_s16 support, for a complete list of changes see below: ------------------------------------------------------------------------ r22787 | laksen | 2012-10-20 22:00:36 +0200 (Sa, 20 Okt 2012) | 1 line Properly do NR_DEFAULTFLAGS detection/allocation/deallocation ------------------------------------------------------------------------ r22782 | laksen | 2012-10-20 07:44:55 +0200 (Sa, 20 Okt 2012) | 1 line Fixed flags detections code for wide->short optimization code for Thumb-2 ------------------------------------------------------------------------ r22778 | laksen | 2012-10-19 20:23:14 +0200 (Fr, 19 Okt 2012) | 1 line Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc) ------------------------------------------------------------------------ r22647 | laksen | 2012-10-14 21:28:08 +0200 (So, 14 Okt 2012) | 1 line Added register specifications to lpc1768.pp. From Joan Duran ------------------------------------------------------------------------ r22646 | laksen | 2012-10-14 21:10:20 +0200 (So, 14 Okt 2012) | 4 lines Fixed some minor formating issues Implemented a small heap mananger Implemented console IO Changed default LineEnding to CrLf(to ease console IO parsing) ------------------------------------------------------------------------ r22599 | laksen | 2012-10-09 08:58:58 +0200 (Di, 09 Okt 2012) | 1 line Added all STM32F1 configurations ------------------------------------------------------------------------ r22597 | laksen | 2012-10-08 22:10:45 +0200 (Mo, 08 Okt 2012) | 1 line Added initial support for the Cortex-M4F FPv4_S16 FPU ------------------------------------------------------------------------ r22596 | laksen | 2012-10-08 22:04:14 +0200 (Mo, 08 Okt 2012) | 1 line Added FPv4_d16 FPU instructions, and a few extra registers ------------------------------------------------------------------------ r22592 | laksen | 2012-10-08 16:07:40 +0200 (Mo, 08 Okt 2012) | 2 lines Added support for IT block merging Added a peephole pattern check for UXTB->UXTH chains ------------------------------------------------------------------------ r22590 | laksen | 2012-10-08 14:30:00 +0200 (Mo, 08 Okt 2012) | 3 lines Add CBNZ/CBZ instructions Create preliminary Thumb-2 PeepHoleOptPass2 code, hacked together from the ARM mode code Added a number of simple size optimizations for common Thumb-2 instructions ------------------------------------------------------------------------ r22582 | laksen | 2012-10-08 06:49:39 +0200 (Mo, 08 Okt 2012) | 3 lines Fix optimizations of Thumb-2 code Fix problem with loading of condition operand for IT instructions Properly split IT blocks when register allocator tries to spill inside a block. ------------------------------------------------------------------------ r22581 | laksen | 2012-10-08 05:15:40 +0200 (Mo, 08 Okt 2012) | 4 lines Fixed assembler calling command line for cpus>ARMv5TE. EDSP instructions will generate errors while assembling, due to RTL assembler routines Updated boot code for all Cortex-M3 controllers, and sc32442b to use weak linking for exception tables. Cortex-M3 devices now also share initialization routine to simplify maintenance STM32F10x classes now have specific units which fit the interrupt source names and counts ------------------------------------------------------------------------ r22580 | laksen | 2012-10-08 05:10:44 +0200 (Mo, 08 Okt 2012) | 2 lines Added support for .section, .set, .weak, and .thumb_set directive for GAS assembler reader IFDEF'ed JVM specific assembler directives, to prevent ait_* set to exceed 32 elements ------------------------------------------------------------------------ r22579 | laksen | 2012-10-08 02:10:52 +0200 (Mo, 08 Okt 2012) | 3 lines Remove all traces of the interrupt vector table generation mechanism Clean up cpuinfo tables Fixed ARMv7M bug(BLX <label> doesn't exist on that version) git-svn-id: trunk@22792 -
163 lines
5.5 KiB
ObjectPascal
163 lines
5.5 KiB
ObjectPascal
{
|
|
Copyright (c) 2002 by Florian Klaempfl
|
|
|
|
This unit contains the CPU specific part of tprocinfo
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 2 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program; if not, write to the Free Software
|
|
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
|
|
****************************************************************************
|
|
}
|
|
|
|
{ This unit contains the CPU specific part of tprocinfo. }
|
|
unit cpupi;
|
|
|
|
{$i fpcdefs.inc}
|
|
|
|
interface
|
|
|
|
uses
|
|
globtype,cutils,
|
|
procinfo,cpuinfo,psub;
|
|
|
|
type
|
|
tarmprocinfo = class(tcgprocinfo)
|
|
floatregstart : aint;
|
|
// procedure handle_body_start;override;
|
|
// procedure after_pass1;override;
|
|
procedure set_first_temp_offset;override;
|
|
function calc_stackframe_size:longint;override;
|
|
procedure init_framepointer; override;
|
|
end;
|
|
|
|
|
|
implementation
|
|
|
|
uses
|
|
globals,systems,
|
|
cpubase,
|
|
aasmtai,aasmdata,
|
|
tgobj,
|
|
symconst,symsym,paramgr,
|
|
cgbase,cgutils,
|
|
cgobj;
|
|
|
|
procedure tarmprocinfo.set_first_temp_offset;
|
|
begin
|
|
{ We allocate enough space to save all registers because we can't determine
|
|
the necessary space because the used registers aren't known before
|
|
secondpass is run. Even worse, patching
|
|
the local offsets after generating the code could cause trouble because
|
|
"shifter" constants could change to non-"shifter" constants. This
|
|
is especially a problem when taking the address of a local. For now,
|
|
this extra memory should hurt less than generating all local contants with offsets
|
|
>256 as non shifter constants }
|
|
if (po_nostackframe in procdef.procoptions) then
|
|
begin
|
|
{ maxpushedparasize sghould be zero,
|
|
if not we will get an error later. }
|
|
tg.setfirsttemp(maxpushedparasize);
|
|
exit;
|
|
end;
|
|
if tg.direction = -1 then
|
|
begin
|
|
if (target_info.system<>system_arm_darwin) then
|
|
{ Non-Darwin, worst case: r4-r10,r11,r13,r14,r15 is saved -> -28-16, but we
|
|
always adjust the frame pointer to point to the first stored
|
|
register (= last register in list above) -> + 4 }
|
|
tg.setfirsttemp(-28-16)
|
|
else
|
|
{ on Darwin first r4-r7,r14 are saved, then r7 is adjusted to
|
|
point to the saved r7, and next r8,r10,r11 gets saved -> -24
|
|
(r4-r6 and r8,r10,r11) }
|
|
tg.setfirsttemp(-24)
|
|
end
|
|
else
|
|
tg.setfirsttemp(maxpushedparasize);
|
|
end;
|
|
|
|
|
|
function tarmprocinfo.calc_stackframe_size:longint;
|
|
var
|
|
firstfloatreg,lastfloatreg,
|
|
r : byte;
|
|
floatsavesize : aword;
|
|
regs: tcpuregisterset;
|
|
begin
|
|
maxpushedparasize:=align(maxpushedparasize,max(current_settings.alignment.localalignmin,4));
|
|
floatsavesize:=0;
|
|
case current_settings.fputype of
|
|
fpu_fpa,
|
|
fpu_fpa10,
|
|
fpu_fpa11:
|
|
begin
|
|
{ save floating point registers? }
|
|
firstfloatreg:=RS_NO;
|
|
regs:=cg.rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall);
|
|
for r:=RS_F0 to RS_F7 do
|
|
if r in regs then
|
|
begin
|
|
if firstfloatreg=RS_NO then
|
|
firstfloatreg:=r;
|
|
lastfloatreg:=r;
|
|
end;
|
|
if firstfloatreg<>RS_NO then
|
|
floatsavesize:=(lastfloatreg-firstfloatreg+1)*12;
|
|
end;
|
|
fpu_vfpv2,
|
|
fpu_vfpv3,
|
|
fpu_vfpv3_d16:
|
|
begin
|
|
floatsavesize:=0;
|
|
regs:=cg.rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall);
|
|
for r:=RS_D0 to RS_D31 do
|
|
if r in regs then
|
|
inc(floatsavesize,8);
|
|
end;
|
|
fpu_fpv4_s16:
|
|
begin
|
|
floatsavesize:=0;
|
|
regs:=cg.rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall);
|
|
for r:=RS_D0 to RS_D15 do
|
|
if r in regs then
|
|
inc(floatsavesize,8);
|
|
end;
|
|
end;
|
|
floatsavesize:=align(floatsavesize,max(current_settings.alignment.localalignmin,4));
|
|
result:=Align(tg.direction*tg.lasttemp,max(current_settings.alignment.localalignmin,4))+maxpushedparasize+aint(floatsavesize);
|
|
floatregstart:=tg.direction*result+maxpushedparasize;
|
|
if tg.direction=1 then
|
|
dec(floatregstart,floatsavesize);
|
|
end;
|
|
|
|
|
|
procedure tarmprocinfo.init_framepointer;
|
|
begin
|
|
if not(target_info.system in systems_darwin) then
|
|
begin
|
|
RS_FRAME_POINTER_REG:=RS_R11;
|
|
NR_FRAME_POINTER_REG:=NR_R11;
|
|
end
|
|
else
|
|
begin
|
|
RS_FRAME_POINTER_REG:=RS_R7;
|
|
NR_FRAME_POINTER_REG:=NR_R7;
|
|
end;
|
|
end;
|
|
|
|
|
|
begin
|
|
cprocinfo:=tarmprocinfo;
|
|
end.
|