mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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f36e5411af
a) cpu64bitaddr, which means that we are generating a compiler which
will generate code for targets with a 64 bit address space/abi
b) cpu64bitalu, which means that we are generating a compiler which
will generate code for a cpu with support for 64 bit integer
operations (possibly running in a 32 bit address space, depending
on the cpu64bitaddr define)
All cpus which had cpu64bit set now have both the above defines set,
and none of the 32 bit cpus have cpu64bitalu set (and none will
compile with it currently)
+ pint and puint types, similar to aint/aword (not pword because that
that conflicts with pword=^word)
* several changes from aint/aword to pint/pword
* some changes of tcgsize2size[OS_INT] to sizeof(pint)
git-svn-id: trunk@10320 -
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| .. | ||
| aasmcpu.pas | ||
| aoptcpu.pas | ||
| aoptcpub.pas | ||
| aoptcpud.pas | ||
| cgcpu.pas | ||
| cpubase.pas | ||
| cpugas.pas | ||
| cpuinfo.pas | ||
| cpunode.pas | ||
| cpupara.pas | ||
| cpupi.pas | ||
| cputarg.pas | ||
| itcpugas.pas | ||
| ncpuadd.pas | ||
| ncpucall.pas | ||
| ncpucnv.pas | ||
| ncpuinln.pas | ||
| ncpumat.pas | ||
| ncpuset.pas | ||
| opcode.inc | ||
| racpu.pas | ||
| racpugas.pas | ||
| rgcpu.pas | ||
| rspcon.inc | ||
| rspdwrf.inc | ||
| rspnor.inc | ||
| rspnum.inc | ||
| rsprni.inc | ||
| rspsri.inc | ||
| rspstab.inc | ||
| rspstd.inc | ||
| rspsup.inc | ||
| spreg.dat | ||
| strinst.inc | ||