..
aasmcpu.pas
* patch by Christo Crause: more descriptive error message when BRxx destination out of reach
2018-02-25 15:31:17 +00:00
agavrgas.pas
* LDD/STD need always an offset, resolves #33086
2018-01-28 21:06:13 +00:00
aoptcpu.pas
* modified patch by Gareth Moreton to pool TmpUsedRegs in the assembler optimizers, resolves #34679
2019-01-20 14:16:38 +00:00
aoptcpub.pas
- get rid of MaxOps, it is redundant with max_operands
2018-11-02 21:32:29 +00:00
aoptcpud.pas
avrreg.dat
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ccpuinnr.inc
+ implemented some AVR specific intrinsics
2017-11-01 16:33:34 +00:00
cgcpu.pas
* properly allocate parameter registers for constants on avr, resolves #33932
2019-01-12 13:28:09 +00:00
cpubase.pas
* max_operands needs only to be 2 on avr
2018-11-03 10:39:58 +00:00
cpuinfo.pas
* patch by Christo Crause: the subarch type for atmega 8, 8A, 16 & 32 was incorrect. Atmega8A was also listed under the wrong subarch type in the makefile, also fixed.
2018-02-18 10:54:59 +00:00
cpunode.pas
+ implemented some AVR specific intrinsics
2017-11-01 16:33:34 +00:00
cpupara.pas
* keep track of whether a routine has a C-style variadic parameter in the
2019-02-23 15:42:45 +00:00
cpupi.pas
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
2016-12-16 22:41:21 +00:00
cputarg.pas
hlcgcpu.pas
* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
2014-08-19 20:22:54 +00:00
itcpugas.pas
+ xch instruction for avr
2016-11-19 19:21:09 +00:00
navradd.pas
* GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
2017-09-11 14:53:06 +00:00
navrcnv.pas
* named class properly
2015-04-09 20:36:47 +00:00
navrinl.pas
+ implemented some AVR specific intrinsics
2017-11-01 16:33:34 +00:00
navrmat.pas
* missing skiplabel added, resolves #33423
2018-03-13 18:45:32 +00:00
navrmem.pas
* use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler)
2017-07-28 15:54:03 +00:00
navrutil.pas
* rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR
2017-05-23 19:58:39 +00:00
raavr.pas
* max_operands needs only to be 2 on avr
2018-11-03 10:39:58 +00:00
raavrgas.pas
* keep track of the temp position separately from the offset in references,
2018-04-22 17:03:16 +00:00
ravrcon.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrdwa.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrnor.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrnum.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrrni.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrsri.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrsta.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrstd.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
ravrsup.inc
* keep the names of X, Y and Z in assembler files, fixes issue #32150
2017-07-23 19:24:45 +00:00
rgcpu.pas
* keep track of the temp position separately from the offset in references,
2018-04-22 17:03:16 +00:00
symcpu.pas
o fixes handling of iso i/o parameters/program parameters:
2015-05-01 20:58:31 +00:00