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a64att.inc
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+ some opcodes added
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2021-10-30 20:21:59 +02:00 |
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a64atts.inc
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+ some opcodes added
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2021-10-30 20:21:59 +02:00 |
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a64ins.dat
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+ some opcodes added
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2021-10-30 20:21:59 +02:00 |
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a64nop.inc
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a64op.inc
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+ some opcodes added
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2021-10-30 20:21:59 +02:00 |
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a64reg.dat
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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a64tab.inc
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aasmcpu.pas
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* a64: Corrected supported shifter/extender mnemonics for arithmetic/logical instructions
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2023-10-22 13:13:58 +00:00 |
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agcpugas.pas
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Add -Awin64-as option for aarch64 compiler for win64 target
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2023-05-26 11:15:55 +00:00 |
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aoptcpu.pas
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* a64: SkipAligns calls removed.
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2023-12-29 14:17:08 +00:00 |
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aoptcpub.pas
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* fix case completeness and unreachable code warnings in compiler that would
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2019-05-12 14:29:03 +00:00 |
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aoptcpud.pas
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cgcpu.pas
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* compilation after merge fixed
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2023-01-25 20:44:34 +01:00 |
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cpubase.pas
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* a64: Corrected supported shifter/extender mnemonics for arithmetic/logical instructions
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2023-10-22 13:13:58 +00:00 |
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cpuinfo.pas
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* cleanup: cs_opt_loopunroll is a generic optimization for a long time already
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2022-03-08 23:03:18 +01:00 |
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cpunode.pas
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Adding aaarch64-embedded target
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2022-01-05 12:29:00 +00:00 |
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cpupara.pas
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* according to Jonas iOS doesn't zero extend results in the callee either, so check removed
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2023-09-12 23:05:48 +02:00 |
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cpupi.pas
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+ implement compiler support for SEH on Win64
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2020-04-21 06:06:05 +00:00 |
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cputarg.pas
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Adding aaarch64-embedded target
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2022-01-05 12:29:00 +00:00 |
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hlcgcpu.pas
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* AArch64: fix storing a 32 bit value in the lower 32 bits of a 64 bit
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2021-04-19 20:52:12 +00:00 |
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itcpugas.pas
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naarch64util.pas
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Additional copyright header
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2022-01-05 12:29:00 +00:00 |
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ncpuadd.pas
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* a64: Node parser now attempts to directly create BIC, ORN and EON instructions
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2023-11-08 21:07:00 +00:00 |
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ncpucnv.pas
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* Removed unused local vars.
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2018-11-02 18:44:29 +00:00 |
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ncpucon.pas
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* avoid that -0.0 is handled by the eor optimization
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2019-09-04 20:45:24 +00:00 |
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ncpuflw.pas
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* patch by Marģers to unify internal error numbers, resolves #37888
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2020-10-13 19:59:01 +00:00 |
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ncpuinl.pas
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+ in_min/max_dword/longint support for aarch64
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2021-12-19 16:16:44 +01:00 |
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ncpumat.pas
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Avoid range/overflow error after commit #49290
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2021-04-30 09:55:11 +00:00 |
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ncpumem.pas
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* keep track of the temp position separately from the offset in references,
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2018-04-22 17:03:16 +00:00 |
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ncpuset.pas
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* generate jump tables into the same section as the code as otherwise we'll get bogus relocations (in case of clang.exe) or a future support for armasm64.exe will reject the relative symbols outright
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2020-04-21 06:06:36 +00:00 |
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ra64con.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64dwa.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64nor.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64num.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64rni.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64sri.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64sta.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64std.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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ra64sup.inc
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Adding AArch64 CurrentEL register
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2022-07-25 19:05:00 +00:00 |
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racpu.pas
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* AArch64: added SIMD instructions (only plain ARMv8-A for now)
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2020-10-15 20:29:36 +00:00 |
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racpugas.pas
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AArch64 asm reader: add support for fpcmp(e) conditions
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2022-04-03 13:40:21 +02:00 |
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rgcpu.pas
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* AArch64: fix spilling integer registers to stack offsets that cannot be
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2021-04-14 20:56:32 +00:00 |
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symcpu.pas
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tripletcpu.pas
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* mark all external assemblers using an LLVM tool using af_llvm
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2020-07-19 14:30:35 +00:00 |
