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* some m68k stuff fixed
This commit is contained in:
florian
parent
03d224009d
commit
1f18d7ac1b
@ -57,17 +57,12 @@ interface
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const
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regname_count=45;
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regname_count_bsstart=32; {Largest power of 2 out of regname_count.}
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regname_count_bsstart=32; { Largest power of 2 out of regname_count. }
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implementation
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uses
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{$ifdef Delphi}
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dmisc,
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{$else Delphi}
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dos,
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{$endif Delphi}
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cutils,globtype,systems,
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fmodule,finput,verbose,cpubase,
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itcpugas
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@ -882,7 +877,10 @@ var
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end.
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{
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$Log$
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Revision 1.49 2004-04-12 18:59:32 florian
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Revision 1.50 2004-04-25 21:26:16 florian
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* some m68k stuff fixed
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Revision 1.49 2004/04/12 18:59:32 florian
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* small x86_64 fixes
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Revision 1.48 2004/03/17 22:27:41 florian
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@ -40,71 +40,9 @@ interface
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end;
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const
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gas_op2str:op2strtable=
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{ warning: CPU32 opcodes are not fully compatible with the MC68020. }
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{ 68000 only opcodes }
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('abcd',
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'add','adda','addi','addq','addx','and','andi',
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'asl','asr','bcc','bcs','beq','bge','bgt','bhi',
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'ble','bls','blt','bmi','bne','bpl','bvc','bvs',
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'bchg','bclr','bra','bset','bsr','btst','chk',
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'clr','cmp','cmpa','cmpi','cmpm','dbcc','dbcs','dbeq','dbge',
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'dbgt','dbhi','dble','dbls','dblt','dbmi','dbne','dbra',
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'dbpl','dbt','dbvc','dbvs','dbf','divs','divu',
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'eor','eori','exg','illegal','ext','jmp','jsr',
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'lea','link','lsl','lsr','move','movea','movei','moveq',
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'movem','movep','muls','mulu','nbcd','neg','negx',
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'nop','not','or','ori','pea','rol','ror','roxl',
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'roxr','rtr','rts','sbcd','scc','scs','seq','sge',
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'sgt','shi','sle','sls','slt','smi','sne',
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'spl','st','svc','svs','sf','sub','suba','subi','subq',
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'subx','swap','tas','trap','trapv','tst','unlk',
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'rte','reset','stop',
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{ mc68010 instructions }
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'bkpt','movec','moves','rtd',
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{ mc68020 instructions }
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'bfchg','bfclr','bfexts','bfextu','bfffo',
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'bfins','bfset','bftst','callm','cas','cas2',
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'chk2','cmp2','divsl','divul','extb','pack','rtm',
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'trapcc','tracs','trapeq','trapf','trapge','trapgt',
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'traphi','traple','trapls','traplt','trapmi','trapne',
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'trappl','trapt','trapvc','trapvs','unpk',
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{ fpu processor instructions - directly supported only. }
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{ ieee aware and misc. condition codes not supported }
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'fabs','fadd',
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'fbeq','fbne','fbngt','fbgt','fbge','fbnge',
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'fblt','fbnlt','fble','fbgl','fbngl','fbgle','fbngle',
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'fdbeq','fdbne','fdbgt','fdbngt','fdbge','fdbnge',
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'fdblt','fdbnlt','fdble','fdbgl','fdbngl','fdbgle','fdbngle',
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'fseq','fsne','fsgt','fsngt','fsge','fsnge',
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'fslt','fsnlt','fsle','fsgl','fsngl','fsgle','fsngle',
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'fcmp','fdiv','fmove','fmovem',
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'fmul','fneg','fnop','fsqrt','fsub','fsgldiv',
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'fsflmul','ftst',
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'ftrapeq','ftrapne','ftrapgt','ftrapngt','ftrapge','ftrapnge',
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'ftraplt','ftrapnlt','ftraple','ftrapgl','ftrapngl','ftrapgle','ftrapngle',
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{ protected instructions }
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'cprestore','cpsave',
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{ fpu unit protected instructions }
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{ and 68030/68851 common mmu instructions }
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{ (this may include 68040 mmu instructions) }
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'frestore','fsave','pflush','pflusha','pload','pmove','ptest',
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{ useful for assembly language output }
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'label','none','db','s','b','fb');
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gas_opsize2str : array[topsize] of string[2] =
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('','.b','.w','.l','.s','.d','.x',''
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);
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gas_reg2str : reg2strtable =
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('', '%d0','%d1','%d2','%d3','%d4','%d5','%d6','%d7',
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'%a0','%a1','%a2','%a3','%a4','%a5','%a6','%sp',
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'-(%sp)','(%sp)+',
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'%ccr','%fp0','%fp1','%fp2','%fp3','%fp4','%fp5',
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'%fp6','%fp7','%fpcr','%sr','%ssp','%dfc',
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'%sfc','%vbr','%fpsr');
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gas_opsize2str : array[topsize] of string[2] =
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('','.b','.w','.l','.s','.d','.x',''
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);
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implementation
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@ -113,7 +51,6 @@ interface
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verbose;
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function getreferencestring(var ref : treference) : string;
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var
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s,basestr,indexstr : string;
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@ -417,7 +354,10 @@ initialization
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end.
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{
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$Log$
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Revision 1.7 2003-02-19 22:00:16 daniel
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Revision 1.8 2004-04-25 21:26:16 florian
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* some m68k stuff fixed
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Revision 1.7 2003/02/19 22:00:16 daniel
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* Code generator converted to new register notation
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- Horribily outdated todo.txt removed
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@ -26,11 +26,10 @@ unit cpubase;
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{$i fpcdefs.inc}
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interface
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uses
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strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
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interface
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uses
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strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
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{*****************************************************************************
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Assembler Opcodes
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@ -513,7 +512,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.25 2004-04-18 21:13:59 florian
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Revision 1.26 2004-04-25 21:26:16 florian
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* some m68k stuff fixed
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Revision 1.25 2004/04/18 21:13:59 florian
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* more adaptions for m68k
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Revision 1.24 2004/01/30 12:17:18 florian
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@ -8,37 +8,48 @@
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;
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NO,$00,$00,INVALID,-1
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D0,$01,$00,d0,0
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D1,$01,$01,d1,1
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D2,$01,$02,d2,2
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D3,$01,$03,d3,3
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D4,$01,$04,d4,4
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D5,$01,$05,d5,5
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D6,$01,$06,d6,6
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D7,$01,$07,d6,7
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A0,$01,$08,a0,8
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A1,$01,$09,a1,9
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A2,$01,$0a,a2,10
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A3,$01,$0b,a3,11
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A4,$01,$0c,a4,12
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A5,$01,$0d,a5,13
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A6,$01,$0e,a6,14
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SP,$01,$0f,sp,15
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D0,$01,$00,d0,%d0,0
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D1,$01,$01,d1,%d1,1
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D2,$01,$02,d2,%d2,2
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D3,$01,$03,d3,%d3,3
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D4,$01,$04,d4,%d4,4
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D5,$01,$05,d5,%d5,5
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D6,$01,$06,d6,%d6,6
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D7,$01,$07,d7,%d7,7
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A0,$01,$08,a0,%a0,8
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A1,$01,$09,a1,%a1,9
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A2,$01,$0a,a2,%a2,10
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A3,$01,$0b,a3,%a3,11
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A4,$01,$0c,a4,%a4,12
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A5,$01,$0d,a5,%a5,13
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A6,$01,$0e,a6,%a6,14
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SP,$01,$0f,sp,%sp,15
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FP0,$02,$00,fp0,16
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FP1,$02,$01,fp1,17
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FP2,$02,$02,fp2,18
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FP3,$02,$03,fp3,19
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FP4,$02,$04,fp4,20
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FP5,$02,$05,fp5,21
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FP6,$02,$06,fp6,22
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FP7,$02,$07,fp7,23
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FP0,$02,$00,fp0,%fp0,16
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FP1,$02,$01,fp1,%fp1,17
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FP2,$02,$02,fp2,%fp2,18
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FP3,$02,$03,fp3,%fp3,19
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FP4,$02,$04,fp4,%fp4,20
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FP5,$02,$05,fp5,%fp5,21
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FP6,$02,$06,fp6,%fp6,22
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FP7,$02,$07,fp7,%fp7,23
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PC,$05,$00,pc,24
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CCR,$05,$01,ccr,%ccr,0
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FPCR,$05,$02,fpcr,%fpcr,0
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SR,$05,$03,sr,%sr,0
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SSP,$05,$04,ssp,%ssp,0
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DFC,$05,$05,dfc,%dfc,0
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SFC,$05,$06,sfc,%sfc,0
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VBR,$05,$07,vbr,%vbr,0
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FPSR,$05,$08,fpsr,%fpsr,0
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;
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; $Log$
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; Revision 1.1 2003-12-10 02:30:58 karoly
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; Revision 1.2 2004-04-25 21:26:16 florian
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; * some m68k stuff fixed
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;
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; Revision 1.1 2003/12/10 02:30:58 karoly
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; * initial revision
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;
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;
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@ -36,7 +36,6 @@ interface
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procedure second_int_to_real;override;
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procedure second_int_to_bool;override;
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procedure pass_2;override;
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procedure second_call_helper(c : tconverttype); override;
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end;
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implementation
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@ -49,7 +48,7 @@ implementation
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ncon,ncal,
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ncgutil,
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cpubase,aasmcpu,
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rgobj,tgobj,cgobj,cginfo,globtype,cgcpu;
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rgobj,tgobj,cgobj,globtype,cgcpu;
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{*****************************************************************************
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@ -136,7 +135,7 @@ implementation
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if not signed then
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internalerror(20020814);
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location.register := rg.getregisterfpu(exprasmlist);
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location.register:=cg.getfpuregister(exprasmlist,opsize);
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case left.location.loc of
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LOC_REGISTER, LOC_CREGISTER:
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begin
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@ -184,27 +183,27 @@ implementation
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end
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else
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begin
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hreg2:=rg.getregisterint(exprasmlist,opsize);
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cg.a_load_ref_reg(exprasmlist,opsize,
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hreg2:=cg.getintregister(exprasmlist,opsize);
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cg.a_load_ref_reg(exprasmlist,opsize,opsize,
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left.location.reference,hreg2);
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exprasmlist.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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rg.ungetregister(exprasmlist,hreg2);
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cg.ungetregister(exprasmlist,hreg2);
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end;
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reference_release(exprasmlist,left.location.reference);
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resflags:=F_NE;
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hreg1 := rg.getregisterint(exprasmlist,opsize);
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hreg1:=cg.getintregister(exprasmlist,opsize);
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end;
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LOC_REGISTER,LOC_CREGISTER :
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begin
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hreg2 := left.location.register;
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hreg2:=left.location.register;
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exprasmlist.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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rg.ungetregister(exprasmlist,hreg2);
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hreg1 := rg.getregisterint(exprasmlist,opsize);
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cg.ungetregister(exprasmlist,hreg2);
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hreg1:=cg.getintregister(exprasmlist,opsize);
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resflags:=F_NE;
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end;
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LOC_FLAGS :
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begin
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hreg1:=rg.getregisterint(exprasmlist,opsize);
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hreg1:=cg.getintregister(exprasmlist,opsize);
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resflags:=left.location.resflags;
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end;
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else
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@ -215,62 +214,6 @@ implementation
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end;
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procedure tm68ktypeconvnode.second_call_helper(c : tconverttype);
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const
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secondconvert : array[tconverttype] of pointer = (
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@second_nothing, {equal}
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@second_nothing, {not_possible}
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@second_nothing, {second_string_to_string, handled in resulttype pass }
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@second_char_to_string,
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@second_nothing, {char_to_charray}
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@second_nothing, { pchar_to_string, handled in resulttype pass }
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@second_nothing, {cchar_to_pchar}
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@second_cstring_to_pchar,
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@second_ansistring_to_pchar,
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@second_string_to_chararray,
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@second_nothing, { chararray_to_string, handled in resulttype pass }
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@second_array_to_pointer,
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@second_pointer_to_array,
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@second_int_to_int,
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@second_int_to_bool,
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@second_bool_to_int, { bool_to_bool }
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@second_bool_to_int,
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@second_real_to_real,
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@second_int_to_real,
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@second_nothing, { currency_to_real, handled in resulttype pass }
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@second_proc_to_procvar,
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@second_nothing, { arrayconstructor_to_set }
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@second_nothing, { second_load_smallset, handled in first pass }
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@second_cord_to_pointer,
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@second_nothing, { interface 2 string }
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@second_nothing, { interface 2 guid }
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@second_class_to_intf,
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@second_char_to_char,
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@second_nothing, { normal_2_smallset }
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@second_nothing, { dynarray_2_openarray }
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@second_nothing, { tc_pwchar_2_string }
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{$ifdef fpc}@{$endif}second_nothing, { variant_2_dynarray }
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{$ifdef fpc}@{$endif}second_nothing { dynarray_2_variant}
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);
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type
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tprocedureofobject = procedure of object;
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var
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r : packed record
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proc : pointer;
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obj : pointer;
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end;
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begin
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{ this is a little bit dirty but it works }
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{ and should be quite portable too }
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r.proc:=secondconvert[c];
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r.obj:=self;
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tprocedureofobject(r){$ifdef FPC}();{$endif FPC}
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end;
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procedure tm68ktypeconvnode.pass_2;
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{$ifdef TESTOBJEXT2}
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var
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@ -297,7 +240,10 @@ begin
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end.
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{
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$Log$
|
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Revision 1.11 2004-02-03 22:32:54 peter
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Revision 1.12 2004-04-25 21:26:16 florian
|
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* some m68k stuff fixed
|
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|
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Revision 1.11 2004/02/03 22:32:54 peter
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* renamed xNNbittype to xNNinttype
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* renamed registers32 to registersint
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* replace some s32bit,u32bit with torddef([su]inttype).def.typ
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@ -336,6 +282,4 @@ end.
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+ m68k type conversion nodes
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+ started some mathematical nodes
|
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* out of bound references should now be handled correctly
|
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}
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@ -27,7 +27,7 @@ unit n68kmat;
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interface
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uses
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node,nmat,ncgmat,cpubase,cginfo;
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node,nmat,ncgmat,cpubase,cgbase;
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type
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@ -39,7 +39,7 @@ interface
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tm68kmoddivnode = class(tcgmoddivnode)
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procedure emit_div_reg_reg(signed: boolean;denum,num : tregister);override;
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procedure emit_mod_reg_reg(signed: boolean;denum,num : tregister);override;
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end;
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end;
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|
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|
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@ -49,7 +49,7 @@ implementation
|
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,aasmbase,aasmtai,aasmcpu,
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cgbase,pass_1,pass_2,
|
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pass_1,pass_2,
|
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ncon,
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cpuinfo,paramgr,defutil,
|
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tgobj,ncgutil,cgobj,rgobj,rgcpu,cgcpu,cg64f32;
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@ -124,7 +124,7 @@ implementation
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location_force_reg(exprasmlist,left.location,def_cgsize(left.resulttype.def),false);
|
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location_copy(location,left.location);
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if location.loc=LOC_CREGISTER then
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location.register := rg.getregisterint(exprasmlist,opsize);
|
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location.register := cg.getintregister(exprasmlist,opsize);
|
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{ perform the NOT operation }
|
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cg.a_op_reg_reg(exprasmlist,OP_NOT,opsize,location.register,left.location.register);
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end;
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@ -136,65 +136,65 @@ implementation
|
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*****************************************************************************}
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procedure tm68kmoddivnode.emit_div_reg_reg(signed: boolean;denum,num : tregister);
|
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var
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continuelabel : tasmlabel;
|
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continuelabel : tasmlabel;
|
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reg_d0,reg_d1 : tregister;
|
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begin
|
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{ no RTL call, so inline a zero denominator verification }
|
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{ no RTL call, so inline a zero denominator verification }
|
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if aktoptprocessor <> MC68000 then
|
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begin
|
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begin
|
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{ verify if denominator is zero }
|
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objectlibrary.getlabel(continuelabel);
|
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{ compare against zero, if not zero continue }
|
||||
cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_NE,0,denum,continuelabel);
|
||||
cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(exprasmlist,1));
|
||||
cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(pocall_default,1));
|
||||
cg.a_call_name(exprasmlist,'FPC_HANDLEERROR');
|
||||
paramanager.freeintparaloc(exprasmlist,1);
|
||||
cg.a_label(exprasmlist, continuelabel);
|
||||
if signed then
|
||||
if signed then
|
||||
exprasmlist.concat(taicpu.op_reg_reg(A_DIVS,S_L,denum,num))
|
||||
else
|
||||
exprasmlist.concat(taicpu.op_reg_reg(A_DIVU,S_L,denum,num));
|
||||
{ result should be in denuminator }
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,denum);
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,denum);
|
||||
end
|
||||
else
|
||||
begin
|
||||
{ On MC68000/68010 mw must pass through RTL routines }
|
||||
reg_d0:=rg.getexplicitregisterint(exprasmlist,NR_D0);
|
||||
reg_d1:=rg.getexplicitregisterint(exprasmlist,NR_D1);
|
||||
reg_d0:=NR_D0;
|
||||
cg.getexplicitregister(exprasmlist,NR_D0);
|
||||
reg_d1:=NR_D1;
|
||||
cg.getexplicitregister(exprasmlist,NR_D1);
|
||||
{ put numerator in d0 }
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,reg_d0);
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,reg_d0);
|
||||
{ put denum in D1 }
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,reg_d1);
|
||||
if signed then
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,reg_d1);
|
||||
if signed then
|
||||
cg.a_call_name(exprasmlist,'FPC_DIV_LONGINT')
|
||||
else
|
||||
cg.a_call_name(exprasmlist,'FPC_DIV_CARDINAL');
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,reg_d0,denum);
|
||||
rg.ungetregisterint(exprasmlist,reg_d0);
|
||||
rg.ungetregisterint(exprasmlist,reg_d1);
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,reg_d0,denum);
|
||||
cg.ungetregister(exprasmlist,reg_d0);
|
||||
cg.ungetregister(exprasmlist,reg_d1);
|
||||
end;
|
||||
end;
|
||||
|
||||
|
||||
procedure tm68kmoddivnode.emit_mod_reg_reg(signed: boolean;denum,num : tregister);
|
||||
var tmpreg : tregister;
|
||||
continuelabel : tasmlabel;
|
||||
continuelabel : tasmlabel;
|
||||
signlabel : tasmlabel;
|
||||
reg_d0,reg_d1 : tregister;
|
||||
begin
|
||||
{ no RTL call, so inline a zero denominator verification }
|
||||
{ no RTL call, so inline a zero denominator verification }
|
||||
if aktoptprocessor <> MC68000 then
|
||||
begin
|
||||
begin
|
||||
{ verify if denominator is zero }
|
||||
objectlibrary.getlabel(continuelabel);
|
||||
{ compare against zero, if not zero continue }
|
||||
cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_NE,0,denum,continuelabel);
|
||||
cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(exprasmlist,1));
|
||||
cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(pocall_default,1));
|
||||
cg.a_call_name(exprasmlist,'FPC_HANDLEERROR');
|
||||
paramanager.freeintparaloc(exprasmlist,1);
|
||||
cg.a_label(exprasmlist, continuelabel);
|
||||
|
||||
tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
|
||||
tmpreg:=cg.getintregister(exprasmlist,OS_INT);
|
||||
|
||||
{ we have to prepare the high register with the }
|
||||
{ correct sign. i.e we clear it, check if the low dword reg }
|
||||
@ -215,24 +215,26 @@ implementation
|
||||
exprasmlist.concat(taicpu.op_reg_reg_reg(A_DIVUL,S_L,denum,tmpreg,num));
|
||||
{ remainder in tmpreg }
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,tmpreg,denum);
|
||||
cg.free_scratch_reg(exprasmlist,tmpreg);
|
||||
cg.ungetregister(exprasmlist,tmpreg);
|
||||
end
|
||||
else
|
||||
begin
|
||||
{ On MC68000/68010 mw must pass through RTL routines }
|
||||
Reg_d0:=rg.getexplicitregisterint(exprasmlist,NR_D0);
|
||||
Reg_d1:=rg.getexplicitregisterint(exprasmlist,NR_D1);
|
||||
Reg_d0:=NR_D0;
|
||||
cg.getexplicitregister(exprasmlist,NR_D0);
|
||||
Reg_d1:=NR_D1;
|
||||
cg.getexplicitregister(exprasmlist,NR_D1);
|
||||
{ put numerator in d0 }
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,Reg_D0);
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,Reg_D0);
|
||||
{ put denum in D1 }
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,Reg_D1);
|
||||
if signed then
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,Reg_D1);
|
||||
if signed then
|
||||
cg.a_call_name(exprasmlist,'FPC_MOD_LONGINT')
|
||||
else
|
||||
cg.a_call_name(exprasmlist,'FPC_MOD_CARDINAL');
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,Reg_D0,denum);
|
||||
rg.ungetregisterint(exprasmlist,Reg_D0);
|
||||
rg.ungetregisterint(exprasmlist,Reg_D1);
|
||||
cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,Reg_D0,denum);
|
||||
cg.ungetregister(exprasmlist,Reg_D0);
|
||||
cg.ungetregister(exprasmlist,Reg_D1);
|
||||
end;
|
||||
end;
|
||||
|
||||
@ -244,7 +246,10 @@ begin
|
||||
end.
|
||||
{
|
||||
$Log$
|
||||
Revision 1.7 2003-06-07 18:57:04 jonas
|
||||
Revision 1.8 2004-04-25 21:26:16 florian
|
||||
* some m68k stuff fixed
|
||||
|
||||
Revision 1.7 2003/06/07 18:57:04 jonas
|
||||
+ added freeintparaloc
|
||||
* ppc get/freeintparaloc now check whether the parameter regs are
|
||||
properly allocated/deallocated (and get an extra list para)
|
||||
|
||||
@ -27,7 +27,7 @@ unit ncpuadd;
|
||||
interface
|
||||
|
||||
uses
|
||||
node,nadd,ncgadd,cpubase,cginfo;
|
||||
node,nadd,ncgadd,cpubase;
|
||||
|
||||
|
||||
type
|
||||
@ -37,8 +37,8 @@ interface
|
||||
procedure second_cmp64bit;override;
|
||||
procedure second_cmpboolean;override;
|
||||
private
|
||||
function getresflags(unsigned: boolean) : tresflags;
|
||||
end;
|
||||
function getresflags(unsigned: boolean) : tresflags;
|
||||
end;
|
||||
|
||||
|
||||
implementation
|
||||
@ -110,7 +110,7 @@ implementation
|
||||
tmpreg : tregister;
|
||||
begin
|
||||
location_reset(location,LOC_FLAGS,OS_NO);
|
||||
|
||||
|
||||
case nodetype of
|
||||
equaln,
|
||||
unequaln :
|
||||
@ -125,7 +125,7 @@ implementation
|
||||
(nodetype = gten)) then
|
||||
swapleftright;
|
||||
// now we have to check whether left >= right
|
||||
tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
|
||||
tmpreg := cg.getintregister(exprasmlist,OS_INT);
|
||||
if left.location.loc = LOC_CONSTANT then
|
||||
begin
|
||||
cg.a_op_const_reg_reg(exprasmlist,OP_AND,OS_INT,
|
||||
@ -147,14 +147,14 @@ implementation
|
||||
exprasmlist.concat(taicpu.op_reg_reg(A_AND,S_L,
|
||||
right.location.register,left.location.register));
|
||||
end;
|
||||
cg.free_scratch_reg(exprasmlist,tmpreg);
|
||||
cg.ungetregister(exprasmlist,tmpreg);
|
||||
location.resflags := getresflags(true);
|
||||
end;
|
||||
else
|
||||
internalerror(2002072701);
|
||||
end;
|
||||
|
||||
|
||||
|
||||
|
||||
end;
|
||||
|
||||
|
||||
@ -173,7 +173,7 @@ implementation
|
||||
location_reset(location,LOC_JUMP,OS_NO);
|
||||
|
||||
{ load values into registers (except constants) }
|
||||
load_left_right(true, false);
|
||||
force_reg_left_right(true, false);
|
||||
|
||||
{ determine if the comparison will be unsigned }
|
||||
unsigned:=not(is_signed(left.resulttype.def)) or
|
||||
@ -209,7 +209,7 @@ implementation
|
||||
else
|
||||
begin
|
||||
useconst := false;
|
||||
tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
|
||||
tmpreg := cg.getintregister(exprasmlist,OS_INT);
|
||||
cg.a_load_const_reg(exprasmlist,OS_INT,
|
||||
aword(right.location.value),tmpreg);
|
||||
end
|
||||
@ -227,7 +227,7 @@ implementation
|
||||
begin
|
||||
exprasmlist.concat(taicpu.op_reg_reg(op,S_L,
|
||||
left.location.register,tmpreg));
|
||||
cg.free_scratch_reg(exprasmlist,tmpreg);
|
||||
cg.ungetregister(exprasmlist,tmpreg);
|
||||
end
|
||||
else
|
||||
exprasmlist.concat(taicpu.op_reg_reg(op,S_L,
|
||||
@ -244,8 +244,7 @@ implementation
|
||||
cgsize : TCgSize;
|
||||
isjump : boolean;
|
||||
otl,ofl : tasmlabel;
|
||||
pushedregs : tmaybesave;
|
||||
begin
|
||||
begin
|
||||
if (torddef(left.resulttype.def).typ=bool8bit) or
|
||||
(torddef(right.resulttype.def).typ=bool8bit) then
|
||||
cgsize:=OS_8
|
||||
@ -279,7 +278,6 @@ implementation
|
||||
falselabel:=ofl;
|
||||
end;
|
||||
|
||||
maybe_save(exprasmlist,right.registersint,left.location,pushedregs);
|
||||
isjump:=(right.location.loc=LOC_JUMP);
|
||||
if isjump then
|
||||
begin
|
||||
@ -289,7 +287,6 @@ implementation
|
||||
objectlibrary.getlabel(falselabel);
|
||||
end;
|
||||
secondpass(right);
|
||||
maybe_restore(exprasmlist,left.location,pushedregs);
|
||||
if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
|
||||
location_force_reg(exprasmlist,right.location,cgsize,false);
|
||||
if isjump then
|
||||
@ -300,25 +297,22 @@ implementation
|
||||
|
||||
location_reset(location,LOC_FLAGS,OS_NO);
|
||||
|
||||
load_left_right(true,false);
|
||||
force_reg_left_right(true,false);
|
||||
|
||||
if (left.location.loc = LOC_CONSTANT) then
|
||||
swapleftright;
|
||||
|
||||
|
||||
if (right.location.loc <> LOC_CONSTANT) then
|
||||
exprasmlist.concat(taicpu.op_reg_reg(A_CMP,S_L,
|
||||
left.location.register,right.location.register))
|
||||
exprasmlist.concat(taicpu.op_reg_reg(A_CMP,S_L,
|
||||
left.location.register,right.location.register))
|
||||
else
|
||||
exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,
|
||||
longint(right.location.value),left.location.register));
|
||||
exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,
|
||||
longint(right.location.value),left.location.register));
|
||||
location.resflags := getresflags(true);
|
||||
|
||||
end;
|
||||
|
||||
clear_left_right(true);
|
||||
|
||||
end;
|
||||
|
||||
release_reg_left_right;
|
||||
end;
|
||||
|
||||
|
||||
{*****************************************************************************
|
||||
@ -329,7 +323,7 @@ implementation
|
||||
begin
|
||||
(* load_left_right(true,false);
|
||||
|
||||
case nodetype of
|
||||
case nodetype of
|
||||
ltn,lten,
|
||||
gtn,gten:
|
||||
begin
|
||||
@ -356,11 +350,11 @@ implementation
|
||||
else
|
||||
begin
|
||||
if (aword(right.location.valueqword) <> 0) then
|
||||
tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist)
|
||||
tempreg64.reglo := cg.getintregister(exprasmlist)
|
||||
else
|
||||
tempreg64.reglo := left.location.registerlow;
|
||||
if ((right.location.valueqword shr 32) <> 0) then
|
||||
tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist)
|
||||
tempreg64.reghi := cg.getintregister(exprasmlist)
|
||||
else
|
||||
tempreg64.reghi := left.location.registerhigh;
|
||||
end;
|
||||
@ -391,8 +385,8 @@ implementation
|
||||
end
|
||||
else
|
||||
begin
|
||||
tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist);
|
||||
tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist);
|
||||
tempreg64.reglo := cg.getintregister(exprasmlist);
|
||||
tempreg64.reghi := cg.getintregister(exprasmlist);
|
||||
cg64.a_op64_reg_reg_reg(exprasmlist,OP_XOR,
|
||||
left.location.register64,right.location.register64,
|
||||
tempreg64);
|
||||
@ -403,9 +397,9 @@ implementation
|
||||
tempreg64.reglo,tempreg64.reghi));
|
||||
cg.a_reg_dealloc(exprasmlist,R_0);
|
||||
if (tempreg64.reglo <> left.location.registerlow) then
|
||||
cg.free_scratch_reg(exprasmlist,tempreg64.reglo);
|
||||
cg.ungetregister(exprasmlist,tempreg64.reglo);
|
||||
if (tempreg64.reghi <> left.location.registerhigh) then
|
||||
cg.free_scratch_reg(exprasmlist,tempreg64.reghi);
|
||||
cg.ungetregister(exprasmlist,tempreg64.reghi);
|
||||
|
||||
location_reset(location,LOC_FLAGS,OS_NO);
|
||||
location.resflags := getresflags;
|
||||
@ -432,7 +426,10 @@ end.
|
||||
|
||||
{
|
||||
$Log$
|
||||
Revision 1.3 2004-02-03 22:32:54 peter
|
||||
Revision 1.4 2004-04-25 21:26:16 florian
|
||||
* some m68k stuff fixed
|
||||
|
||||
Revision 1.3 2004/02/03 22:32:54 peter
|
||||
* renamed xNNbittype to xNNinttype
|
||||
* renamed registers32 to registersint
|
||||
* replace some s32bit,u32bit with torddef([su]inttype).def.typ
|
||||
|
||||
Loading…
Reference in New Issue
Block a user