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647 Commits

Author SHA1 Message Date
florian
c7290bfb78 * enclose {$define DEBUG_AOPTCPU} in {$ifdef EXTDEBUG} 2025-03-10 22:50:49 +01:00
J. Gareth "Curious Kit" Moreton
8520dabebb * x86: New RET/lbl/RET optimisation 2024-10-27 08:17:10 +00:00
florian
db5e821ead * more change information updates 2024-07-02 22:21:24 +02:00
florian
9ce7fbeef0 * change information updates 2024-06-28 22:45:00 +02:00
florian
2fe3955be9 + more change information 2024-06-11 23:22:21 +02:00
florian
bdb611c925 * small fix of change information 2024-06-10 23:10:48 +02:00
florian
c64fae2f89 * missing AVX-2 change information fixed 2024-06-03 23:29:37 +02:00
florian
73a251410e + more change information 2024-06-02 23:11:14 +02:00
J. Gareth "Curious Kit" Moreton
2de19f9e66 * x86: Reimplemented TAsmNode XML dumping using new framework 2024-05-30 20:04:11 +00:00
florian
4eb8f8e565 * patch by Marģers 
- Rename 3DNow instruction (fixed long lasting typo in mnemonic). PMULHRWA  --> PMULHRW
    - Add vpclmullqlqdq, vpclmulhqlqdq, vpclmullqhqdq, vpclmulhqhqdq.
    - Fix "typo" for SHA1MSG2
 2024-05-30 21:49:30 +02:00
florian
53459fed2b + CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1 2024-05-24 23:17:07 +02:00
florian
eff10ee9b7 * handle complexer references in tcg8086.a_loadaddr_ref_cgpara properly 2024-05-18 23:39:07 +02:00
florian
b826ad8b7e + CPUX86_HINT_FAST_SHORT_REP_MOVS 
* use FPC_MOVE instead of rep movs if possible, partially fixes
2024-05-16 22:59:21 +02:00
Pierre Muller
a4240a0c62 Fix compilation of i8086/n8086add.pas unit after introduction of get_int_value function 2024-04-17 07:52:05 +00:00
florian
f29ff58ab9 + get_int_value 2024-04-16 23:11:16 +02:00
florian
f0cc07fe68 + 8086: overflow checking for abs(<long/int64>) 2024-03-28 15:07:47 +01:00
J. Gareth "Curious Kit" Moreton
4736cc2360 * Flags specific to TDerefNode have been moved to their own field 2024-03-02 21:31:21 +01:00
J. Gareth "Curious Kit" Moreton
b804fc5164 * Flags specific to TAddNode have been moved to their own field 2024-03-02 21:31:21 +01:00
J. Gareth "Curious Kit" Moreton
ede47ffea9 * New "fast 3-component LEA hint" and "Icelake" CPU options 2023-10-29 10:26:52 +00:00
florian
9c10167b6f + CPUX86_HAS_BSWAP 2023-02-04 19:20:10 +01:00
florian
14466ee9d9 * change table updates 2022-12-06 22:41:30 +01:00
florian
8ad7decaa3 * another change information update 2022-12-04 23:17:56 +01:00
florian
42d91c02bd * continued to fix change information 2022-12-03 23:36:07 +01:00
florian
e0eff8bd89 + more change information fixed 2022-12-02 23:34:36 +01:00
J. Gareth "Curious Kit" Moreton
170c112301 * x86: Added FMA as an FPU target distinct from AVX and AVX2 (the latter of which has a new FPUX86_HAS_AVX2 flag) 2022-11-25 22:14:59 +00:00
J. Gareth "Curious Kit" Moreton
c9461b7313 * x86: Flags that relate to optimization hints rather than features have been moved to a separate set 2022-11-13 19:23:30 +00:00
J. Gareth "Curious Kit" Moreton
aa5517d442 * x86: New CPU feature flags in cpuinfo units 2022-11-11 22:29:58 +00:00
Sven/Sarah Barth
7f3a5eb9ab * extend tabstractprocdef.getcopyas by a parameter to control whether the copy should be registered or not 2022-05-26 21:42:59 +02:00
Sven/Sarah Barth
3aebcccdf2 * allow procvars to not be registered right away 2022-05-26 21:42:52 +02:00
J. Gareth "Curious Kit" Moreton
6f24c8b4ef * x86: Code generation fixes where FLAGS 
register is not properly allocated.
 2022-04-27 20:46:32 +00:00
florian
0e4188749b * started with change information for AVX-512 2022-03-29 22:50:14 +02:00
florian
16881556b9 * change information for AVX-512 mask register instructions 2022-03-28 22:37:09 +02:00
florian
c3ec62878e * completed change information for AVX-2 2022-03-27 23:06:18 +02:00
florian
6ea0050990 * finished change information for AVX1 instructions 2022-03-26 23:44:59 +01:00
florian
2f33c97006 * more change information 2022-03-25 23:17:57 +01:00
florian
6a56ed24ab * another change information update 2022-03-24 22:33:27 +01:00
florian
fbf68af605 * continued to update change information 2022-03-23 21:43:08 +01:00
florian
fba3da47c6 * continued to update change information 2022-03-22 22:55:37 +01:00
florian
de98803751 * few more updated change information entries 2022-03-21 22:51:52 +01:00
florian
c785fa4435 * AES instruction change information fixed 2022-03-20 22:32:23 +01:00
florian
2099e35d82 * change information for SSE 4.2 instructions 2022-03-19 23:15:49 +01:00
florian
6421f2c36b * change information for SSE4.1 instructions 2022-03-18 23:23:31 +01:00
florian
a9db41f1e5 * fixed SSSE3 change information 2022-03-17 22:48:44 +01:00
florian
f5de329076 * change information updates 2022-03-16 23:03:58 +01:00
florian
e9ee0a0be3 * more change information updated 2022-03-15 22:37:49 +01:00
florian
50b6978e68 * more change information updates 2022-03-14 23:11:14 +01:00
florian
b1a72a86e5 * more change information fixed 2022-03-12 22:42:02 +01:00
florian
5e0d5cd92e * fix change information for a lot of MMX instructions 2022-03-11 22:46:51 +01:00
florian
27fb9086aa * cleanup: cs_opt_loopunroll is a generic optimization for a long time already 2022-03-08 23:03:18 +01:00
J. Gareth "Curious Kit" Moreton
f8e04aad03 CMOV now modifies rather than writes to the destination register so RegUsedAfterInstruction behaves properly 2022-01-28 20:17:24 +00:00