Commit Graph

292 Commits

Author SHA1 Message Date
florian
62df4a4083 * patch by Christo Crause: more descriptive error message when BRxx destination out of reach
git-svn-id: trunk@38340 -
2018-02-25 15:31:17 +00:00
florian
5b16a84de1 + RCallReg2RJmp optimization
git-svn-id: trunk@38318 -
2018-02-22 20:19:03 +00:00
florian
d0dd3bd74e * patch by Christo Crause to support ~ in att assembler
* allow -128 to 255 as a constant for instructions taking a byte sized constants (this is also what GNU As accepts), resolves #32039

git-svn-id: trunk@38316 -
2018-02-22 20:14:56 +00:00
florian
90051fd7d2 * better suitable error message for out of range constants
git-svn-id: trunk@38290 -
2018-02-19 21:19:08 +00:00
florian
4cb9ad7e01 * patch (indention adapted) by Christo Crause to check avr inline assembler, resolves also #32261
git-svn-id: trunk@38286 -
2018-02-18 21:58:04 +00:00
florian
055a49b202 * patch by Christo Crause: the subarch type for atmega 8, 8A, 16 & 32 was incorrect. Atmega8A was also listed under the wrong subarch type in the makefile, also fixed.
* atmega8a needs to use rjmp now

git-svn-id: trunk@38282 -
2018-02-18 10:54:59 +00:00
florian
cd41312a8f * fixes not(<qwordbool>) on arm
* fixes not(<(q/l)wordbool>) on avr

git-svn-id: trunk@38263 -
2018-02-16 22:38:35 +00:00
florian
311bcd4c08 * do not destroy flags while clearing R1, resolves #33170
git-svn-id: trunk@38241 -
2018-02-14 19:28:33 +00:00
florian
291ee4b562 * clear r1 (and save/restore) in interrupt routines on avr
+ generate no entry/exit code except ret for empty subroutines

git-svn-id: trunk@38233 -
2018-02-13 17:47:23 +00:00
florian
6b5a514148 * based on a patch by Christo Crause: in finalizeavrcode, ignore assembler breq statements taking an absolute value, resolves #32109
git-svn-id: trunk@38089 -
2018-01-31 18:38:33 +00:00
florian
0662b611ca * patch by Christo Crause: prevent that the compiler converts breq into jmp in inline assembler blocks, resolves #32949
git-svn-id: trunk@38088 -
2018-01-31 18:34:42 +00:00
florian
10516f21f8 * patch by Christo Crause to resolve #33098: AVR - LDS assembler instruction with absolute address gives compiler error
git-svn-id: trunk@38082 -
2018-01-30 20:22:42 +00:00
florian
796eb542be * LDD/STD need always an offset, resolves #33086
git-svn-id: trunk@38072 -
2018-01-28 21:06:13 +00:00
Jonas Maebe
1b66995754 * factored out check to determine whether a variable can be subscripted in
inline assembly, and fixed check after r35959 (mantis #32318)
   o can also subscript parameters passed by value on the stack
   o can also subscript local variables, the parameters passed by reference
     that are subsequently copied into a local

git-svn-id: trunk@37886 -
2018-01-01 14:29:21 +00:00
Jeppe Johansen
a7d3d2d298 Fixed internal error in case inline assembler constants are used.
git-svn-id: trunk@37859 -
2017-12-29 11:50:36 +00:00
Jeppe Johansen
4a169e6b1a Changed subarch of at90pwm161
git-svn-id: trunk@37858 -
2017-12-29 11:30:35 +00:00
florian
0f51cf8546 * avr: correctly write references to nil, resolves #32821
git-svn-id: trunk@37838 -
2017-12-28 10:32:16 +00:00
florian
46ab35edb3 * apply MovOpMov2Op also to inc and dec
* made core more readable

git-svn-id: trunk@37624 -
2017-11-26 15:28:44 +00:00
florian
cb087279d6 * do not generate an andi if the constant is 255
git-svn-id: trunk@37608 -
2017-11-19 18:05:21 +00:00
florian
366360d36c * LdiMov/Cp2Ldi/Cpi may not be performed if reg0=reg1
* cleanup of MovOp2Op
* fixed MovMov2Mov

git-svn-id: trunk@37607 -
2017-11-19 18:05:19 +00:00
florian
ad01f059e8 * after a LdiMov/Cp2Ldi/Cpi optimization, the compiler should not continue to optimize this instruction because then reg. alloc info is wrong
git-svn-id: trunk@37604 -
2017-11-19 18:05:14 +00:00
florian
c7d5525b56 + implemented some AVR specific intrinsics
git-svn-id: trunk@37544 -
2017-11-01 16:33:34 +00:00
florian
3d3298f64d * write absolute references correctly on avr, resolves #32040
git-svn-id: trunk@37419 -
2017-10-07 21:09:20 +00:00
florian
4cf2a2672a changes to fix #32043
* changed most of the variables in the assembler readers used to store constants from aint to tcgint 
  as aint has only the size of the accumular while some CPUs (AVR) allow larger constants in instructions
+ allow access to absolute symbols with address type in inline assembler
* allow absolute addresses in avr inline assembler
+ tests

git-svn-id: trunk@37411 -
2017-10-06 21:07:19 +00:00
florian
7817102727 * patch by Christo Crause to implement 8 bit multiplications for "mul-less" avr types, resolves issue #31925
git-svn-id: trunk@37380 -
2017-10-01 20:34:44 +00:00
florian
1c69ae6a15 handle correctly "reg+const" operands in avr assembler, fixes issue #32016
git-svn-id: trunk@37328 -
2017-09-26 20:14:41 +00:00
florian
9ef646e3c5 * fix avr for new GetNextReg behaviour
* some wrong GetNextReg usage in the avr code generator fixed

git-svn-id: trunk@37316 -
2017-09-24 20:51:05 +00:00
nickysn
db09759763 * also integrated the getnextreg() implementation for 8-bit and 16-bit alus from
the avr and i8086 code generators into the base tcg class

git-svn-id: trunk@37182 -
2017-09-11 15:47:39 +00:00
nickysn
cf28b202eb * integrated the getintregister() implementation for 8-bit and 16-bit alus from
the avr and i8086 code generators into the base tcg class (so it can be reused
  by other 8-bit and 16-bit targets)

git-svn-id: trunk@37181 -
2017-09-11 15:23:59 +00:00
nickysn
ddba821561 * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
from cpubase unit to a method in the tcg class. The reason for doing that is
  that this is now a standard part of the 16-bit and 8-bit code generators and
  moving to the tcg class allows doing extra checks (not done yet, but for
  example, in the future, we can keep track of whether there was an extra
  register allocated with getintregister and halt with an internalerror in case
  GetNextReg() is called for registers, which weren't allocated as a part of a
  sequence, therefore catching a certain class of 8-bit and 16-bit code
  generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
  anything. It might be added to the tcg class, in case it's ever needed, but
  for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.

git-svn-id: trunk@37180 -
2017-09-11 14:53:06 +00:00
nickysn
3c96090d3c + optimized avr code generation for shr by shiftcount=size*8-1 and sar by
shiftcount>=size*8-1. This is commonly used by code, that extracts the sign
  bit and improves code generation for signed division by power-of-2 as well.
  This also fixes building avr-embedded (mantis #32241), which was caused by an
  infinite loop in the register allocator, when regvars are enabled, due to too
  much register pressure, when building charset.pp after r36842.

git-svn-id: trunk@36867 -
2017-08-09 15:53:06 +00:00
nickysn
1476b5168d + added F_PL and F_MI to TResFlags for avr. This allows generating the BRPL and
BRMI instructions via a_jmp_cond

git-svn-id: trunk@36866 -
2017-08-09 15:14:33 +00:00
svenbarth
e76b1b2959 * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler)
git-svn-id: trunk@36809 -
2017-07-28 15:54:03 +00:00
florian
a2e442e111 * keep the names of X, Y and Z in assembler files, fixes issue #32150
git-svn-id: trunk@36776 -
2017-07-23 19:24:45 +00:00
nickysn
5138d4e067 * fixed avr multiplication after r36344
git-svn-id: trunk@36369 -
2017-05-29 12:42:02 +00:00
svenbarth
7c9aeda656 * rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR
git-svn-id: trunk@36310 -
2017-05-23 19:58:39 +00:00
svenbarth
fab6f70de8 * rework AVR's InsertInitFinalTable to make use of get_init_final_list instead of iterating the init/fini functions itself
git-svn-id: trunk@36309 -
2017-05-23 19:46:07 +00:00
Jonas Maebe
61af0fb72d * only take into account the location of the parameter at the callee side to
determine whether it's in a register if it's a pure assembler routine
  * you can't "index" implicit pointers either using their fields

git-svn-id: trunk@36287 -
2017-05-21 20:17:11 +00:00
florian
4a43d992f5 * unified usage of MatchOpType
* fixed generic MatchOpType

git-svn-id: trunk@36145 -
2017-05-07 16:18:33 +00:00
florian
39b7f1bffe * do not write assembler optimizer debug output in avr assembler files
git-svn-id: trunk@36063 -
2017-05-02 19:50:37 +00:00
Jonas Maebe
aa82e00615 * fixed check to determine whether a record parameter can be subscripted
directly in inline assembly: that's only possible if it's a register
    parameter where the address of the record was passed (rather than the
    record itself), or if a parameter has been explicitly typecasted in
    Intel-style assembly using ".size"

git-svn-id: trunk@35959 -
2017-04-26 19:43:35 +00:00
florian
73c46a5988 - removed unused constants
git-svn-id: trunk@35664 -
2017-03-26 13:06:34 +00:00
Jonas Maebe
015f034904 * reverted r35424, wasn't ready for commit yet
git-svn-id: trunk@35426 -
2017-02-11 21:21:44 +00:00
Jonas Maebe
4d9617da97 * fixed check to determine whether a record parameter can be subscripted
directly in inline assembly: that's only possible if it's a register
    parameter where the address of the record was passed (rather than the
    record itself)

git-svn-id: trunk@35424 -
2017-02-11 19:57:08 +00:00
Jonas Maebe
880d438704 * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
inherit from it for LLVM without a thousand ifdefs

git-svn-id: trunk@35141 -
2016-12-16 22:41:21 +00:00
florian
0954e09834 * correctly handle 16 bit signed operations on AVRs without mul instruction, resolves #31036
git-svn-id: trunk@35031 -
2016-12-01 21:01:47 +00:00
Jonas Maebe
a25ebbba3e + added volatility information to all memory references
o separate information for reading and writing, because e.g. in a
     try-block, only the writes to local variables and parameters are
     volatile (they have to be committed immediately in case the next
     instruction causes an exception)
   o for now, only references to absolute memory addresses are marked
     as volatile
   o the volatily information is (should be) properly maintained throughout
     all code generators for all archictures with this patch
   o no optimizers or other compiler infrastructure uses the volatility
     information yet
   o this functionality is not (yet) exposed at the language level, it
     is only for internal code generator use right now

git-svn-id: trunk@34996 -
2016-11-27 18:17:37 +00:00
florian
da7e1b3769 + tavraddrnode.pass_generate_code, avoiding unneeded moves
git-svn-id: trunk@34973 -
2016-11-26 19:31:33 +00:00
florian
8e7101a65a * proper naming of the optimziation in the DebugMsg
git-svn-id: trunk@34957 -
2016-11-24 18:28:48 +00:00
florian
e33b2920dc + CallReg2Jmp optimization
git-svn-id: trunk@34937 -
2016-11-20 18:00:27 +00:00