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07b2982e77
Commit Graph

16170 Commits

Author SHA1 Message Date
Jeppe Johansen
07b2982e77 Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference. 
Use UXTH+UXTB instructions instead of two shifts on processors that supports that.
Eliminate internalerror when constant pointers are typecast as arrays.

git-svn-id: trunk@26647 -
 2014-02-01 13:29:35 +00:00
florian
2a7dcf6c7b * formatting 
git-svn-id: trunk@26646 -
 2014-02-01 13:08:30 +00:00
florian
e3f9982ee1 * make_not_regable is a matter of code generation so do it in pass_1 
git-svn-id: trunk@26645 -
 2014-02-01 13:08:28 +00:00
florian
fbcfb63826 + implement tcasenode.pass_typecheck 
git-svn-id: trunk@26644 -
 2014-02-01 13:08:26 +00:00
florian
d71bfe4c6f * var parameters can be put in registers if the callee is inlined 
git-svn-id: trunk@26643 -
 2014-02-01 13:08:24 +00:00
florian
cd6f4d4469 * fix tsubscriptnode to handle left.location being an fpu or mm register as well. 
git-svn-id: trunk@26642 -
 2014-02-01 13:08:21 +00:00
masta
81517fdf70 Rerun peephole optimizers on the whole block 
Up until now if a peephole optimizer matched we've only restarted from
the current instruction. This patch restarts optimizations on the whole
block if the previous run had at least one match.

As this can take considerable time this will only be enabled if -O3 or
higher is specified.

git-svn-id: trunk@26640 -
 2014-01-31 23:21:52 +00:00
masta
3f8549365a Don't schedule LDRD on ARM 
The load scheduler does not handle LDRD correctly right now, but it does
not prevent A_LDR with PF_D set from beeing scheduled.

git-svn-id: trunk@26637 -
 2014-01-30 21:53:03 +00:00
florian
28a8dc42c6 * fix tcgx86.a_op_reg_reg on x86-64 and make use of it 
git-svn-id: trunk@26636 -
 2014-01-30 20:24:41 +00:00
florian
7d7bf1d877 + make use of SHLX/SHRX on CPUs supporting BMI2 
git-svn-id: trunk@26635 -
 2014-01-30 20:24:39 +00:00
florian
8fba876904 * apply cse to static symbols on x86-64 as well, if their address can be stored 
git-svn-id: trunk@26634 -
 2014-01-30 20:24:36 +00:00
florian
d8c0f11ff9 + cs_userbp optimizer switch, so on x86-64 the compiler can make use of rbp if it is not needed as frame pointer 
git-svn-id: trunk@26633 -
 2014-01-30 19:44:17 +00:00
florian
a3f58e84be * rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers 
git-svn-id: trunk@26632 -
 2014-01-30 19:44:14 +00:00
florian
546f4a5d46 * force records with LOC_CONSTANT into memory when they are subscripted 
git-svn-id: trunk@26630 -
 2014-01-30 19:44:09 +00:00
florian
1d73f49330 * do not force the index location to a register for vec. nodes if the index is already in a register 
git-svn-id: trunk@26629 -
 2014-01-30 17:34:35 +00:00
florian
cd235d8409 + simplify shl/shr x, if (x mod bitsizeof(left))=0 
git-svn-id: trunk@26628 -
 2014-01-30 17:34:33 +00:00
florian
b1f54b2853 * indentation fixed 
git-svn-id: trunk@26627 -
 2014-01-30 17:34:31 +00:00
florian
8989a40b4f * more flags to mark changes fixed 
git-svn-id: trunk@26626 -
 2014-01-30 17:34:28 +00:00
florian
809549a31f * addr nodes can be also considered in cse 
git-svn-id: trunk@26625 -
 2014-01-30 17:19:06 +00:00
florian
3a11dd1055 * create the addr node for cse with create_internal to avoid errors when taking the address of a temp. 
git-svn-id: trunk@26624 -
 2014-01-30 17:19:04 +00:00
florian
fc7dc9e54c * do cse after the init/final code has been inserted, this might enable new cse opportunities 
git-svn-id: trunk@26623 -
 2014-01-30 17:19:01 +00:00
Jeppe Johansen
257b1affaa Fixed previous fix of LsrAnd2Lsr optimization. 
Added an extra condition for <ARMv6 processors in MLA/MLS optimization.

git-svn-id: trunk@26620 -
 2014-01-29 22:22:58 +00:00
Jeppe Johansen
f773334374 Fixed LsrAnd2Lsr peephole optimization for ARM. 
git-svn-id: trunk@26619 -
 2014-01-29 21:35:28 +00:00
Jonas Maebe
859676d7d3 * fixed r26519 for darwin/x86-64, see comments (mantis #25644) 
git-svn-id: trunk@26618 -
 2014-01-29 21:26:45 +00:00
Jonas Maebe
c05da62b0e * detect static data use by record methods and methods of nested classes/ 
records, so we avoid inlining them (mantis #25598)

git-svn-id: trunk@26617 -
 2014-01-29 21:26:38 +00:00
Jonas Maebe
b611882337 * some minor formatting fixes 
git-svn-id: trunk@26616 -
 2014-01-29 19:26:17 +00:00
Jonas Maebe
a6d28b5630 * pass on the "eval" state (whether or not subexpressions should be evaluated) 
when encountering a "(" in a preprocessor expression (broken after r25465,
    mantis #25296)

git-svn-id: trunk@26615 -
 2014-01-29 19:26:12 +00:00
Jonas Maebe
2f741121e9 * don't give an internal error when freeing an error token in the preprocessor 
(mantis #25573)

git-svn-id: trunk@26614 -
 2014-01-29 19:26:03 +00:00
Jeppe Johansen
3b4f59c316 Fixed MLA/MLS peephole optimization and moved it to the generic ARM peephole optimizer. 
git-svn-id: trunk@26613 -
 2014-01-29 17:28:13 +00:00
Jeppe Johansen
184baa3f99 Fixed invalid peephole optimization of ADD/SUB(SP) instructions for ARMv7*M targets. 
git-svn-id: trunk@26612 -
 2014-01-29 17:12:57 +00:00
Jonas Maebe
2adfb6cdda * don't endlessly recurse when printing the typename of a procvardef that 
refers to itself via a pointerdef in its parameter or result type(s)
    (mantis #25551)

git-svn-id: trunk@26610 -
 2014-01-28 20:14:31 +00:00
Jonas Maebe
6d5bef3e1d * removed code duplication in tpointerdef.GetTypeName 
git-svn-id: trunk@26609 -
 2014-01-28 20:14:28 +00:00
Jonas Maebe
89d97a3c2e * only consider tc_pointer_to_array typeconversions to determine whether a 
pointer->array type conversion implies an implicit dereference operation
    (mantis #25622)

git-svn-id: trunk@26608 -
 2014-01-28 20:14:24 +00:00
Jonas Maebe
9c4505045b * fixed formatting 
git-svn-id: trunk@26607 -
 2014-01-28 20:14:10 +00:00
masta
9e0af11ad8 Rerun the peephole optimizer after removing the current instruction. 
This lets the optimizer pickup on more possible optimizations.

git-svn-id: trunk@26606 -
 2014-01-28 16:00:51 +00:00
masta
57ff589ec7 Always set p to the next instruction after removing p from asml. 
Some time ago we introduced GetNextInstructionUsingReg, which might
return an instruction a couple of instructions away from our current
location. Most of the code then just returned the new instruction (hp1)
instead of the instruction following p. This could prevent the peephole
optimizer from finding possible optimizations.

git-svn-id: trunk@26605 -
 2014-01-28 16:00:47 +00:00
masta
c644503daf Add MovLdr2Ldr peephole optimizer for ARM 
The existing LdrLdr2LdrMov optimizer will generate a lot of
sequences like this:

ldr regA, [...]
mov regB, regA
ldr regB, [regB, ...]

this now gets changed to

ldr regA, [...]
ldr regB, [regA, ...]

this saves an instruction and might open up more possibilities for the load scheduler.

git-svn-id: trunk@26603 -
 2014-01-28 13:20:35 +00:00
masta
77d12f61a2 Handle LDRD and STRD correctly in RegInInstruction for ARM 
LDRD and STRD only have the first even numbered register in their instruction operands,
this additional code will also check for the register following it.
Example:
  ldrd r0, [r13]

The old code will only detect r0 as in use, not the implicit r1.

git-svn-id: trunk@26602 -
 2014-01-28 13:20:26 +00:00
pierre
754790f641 Use new static library not supproted message 
git-svn-id: trunk@26598 -
 2014-01-27 22:29:07 +00:00
pierre
6feab20b01 regenerated after: Add different message for static libraary not supported 
git-svn-id: trunk@26597 -
 2014-01-27 22:28:29 +00:00
pierre
b4d0cf5593 * Add different message for static libraary not supported 
git-svn-id: trunk@26596 -
 2014-01-27 22:26:29 +00:00
sergei
ff3fe06af9 * Changed condition around declaration of 'cgpara' to be the same as around its usage. 
- Removed one of $ifdef's.

git-svn-id: trunk@26595 -
 2014-01-27 01:41:51 +00:00
nickysn
5832c323b1 - don't define FPC_HAS_INTERNAL_BSF and FPC_HAS_INTERNAL_BSR on i8086. BSF/BSR 
is 386+ only and the internal handling was not used anyway on i8086, due to
  some nested defines in systemh.inc missing on i8086.

git-svn-id: trunk@26592 -
 2014-01-26 20:02:15 +00:00
nickysn
5e0359d389 * 16/8-bit ALU fix for 64-bit pred/succ after r26580 
git-svn-id: trunk@26590 -
 2014-01-26 15:44:58 +00:00
florian
48ae2d215a + concatcopy variants using sse and avx, only activated if optimization for size is done because at least on an i7-4770 it has shown no benefit 
git-svn-id: trunk@26588 -
 2014-01-26 12:37:54 +00:00
florian
060aa2a7fe + SSE and AVX unit cpu flags 
git-svn-id: trunk@26587 -
 2014-01-26 12:37:52 +00:00
florian
2ec5a649d7 * set Ch_* for more operations 
* Ch_* flags for VMOVSD and VMOVSS are now set for the 2 operand variants

git-svn-id: trunk@26586 -
 2014-01-26 12:37:50 +00:00
nickysn
e83ef05b74 - disable cs_opt_nodecse from -O2 on i8086, because it breaks building packages 
since r26579

git-svn-id: trunk@26583 -
 2014-01-26 02:08:08 +00:00
florian
c44b5d1043 * take care of tempinitcode when creating def information for tempcreatenodes 
git-svn-id: trunk@26581 -
 2014-01-25 09:40:51 +00:00
florian
cb8100bccf * do not reuse registers in prec/succ 
git-svn-id: trunk@26580 -
 2014-01-25 09:40:48 +00:00