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0ffd4f8780
Commit Graph

1206 Commits

Author SHA1 Message Date
florian
0ffd4f8780 * fix compilation of arm compiler on 32 bit hosts 
git-svn-id: trunk@49281 -
 2021-04-27 16:36:40 +00:00
pierre
423940afd7 Avoid range check error inside genitem_thumb2 by changing local variable i type 
git-svn-id: trunk@49278 -
 2021-04-27 14:01:35 +00:00
pierre
d03c3c0669 Disable overflow/range check in some part of the arm code 
git-svn-id: trunk@49274 -
 2021-04-26 21:51:42 +00:00
pierre
c2faf6a8fd Avoid invalid typecast if hp is not an instruction 
git-svn-id: trunk@49273 -
 2021-04-26 21:50:53 +00:00
pierre
f1d30a5bc6 Add .force_thumb pseudo-directive support forarm reader 
git-svn-id: trunk@49271 -
 2021-04-26 21:14:27 +00:00
florian
695665c393 + optimized multiplication for "symmetric" bit patterns on arm 
git-svn-id: trunk@49199 -
 2021-04-13 21:16:56 +00:00
Jonas Maebe
ca399f3c71 * don't generate high-level CFI statements when the selected assembler 
does not support them, even if the target normally uses them
   o fixes assembling with -Aas-darwin for i386/arm/x86-64 (on OS
     versions that used those)

git-svn-id: trunk@49138 -
 2021-04-08 19:50:27 +00:00
pierre
8ea95e9b95 Use value $00000F00 instead of $F0000000 for IF_FPMASK, and adapt all floating point constants, to avoid IF_VFPv4 having the same value as IF_PASS2 
git-svn-id: trunk@49096 -
 2021-03-31 21:03:50 +00:00
Jeppe Johansen
1105726dcf * Add SAMD51P19A controller type. Unit generated by Michael Ring and slightly modified. 
git-svn-id: trunk@49034 -
 2021-03-22 18:40:12 +00:00
florian
09d6398942 * arm: better cfi 
git-svn-id: trunk@48685 -
 2021-02-15 22:25:18 +00:00
florian
e694897bb3 * initial implementation of CFI support for arm (non-thumb) 
git-svn-id: trunk@48684 -
 2021-02-15 21:34:07 +00:00
florian
a3d68e6839 * arm thumb: generate proper cfi 
git-svn-id: trunk@48678 -
 2021-02-14 21:26:41 +00:00
florian
44856e660c * ARM: NR_RETURN_ADDRESS_REG is R14 
git-svn-id: trunk@48677 -
 2021-02-14 21:25:36 +00:00
florian
0316a7697f * arm thumb1: several fixes for the internal assembler writer 
git-svn-id: trunk@48675 -
 2021-02-14 17:52:26 +00:00
florian
33ce19799b * forgotten part of last commit 
git-svn-id: trunk@48674 -
 2021-02-14 17:15:37 +00:00
florian
f1883c4e61 * arm: taicpu uses set instead of boolean to store instruction states 
+ track if an instruction is a thumb instruction in taicpu

git-svn-id: trunk@48673 -
 2021-02-14 15:51:48 +00:00
florian
dda9f83dfe * factored out tbasecgarm.init_mmregister_allocator 
git-svn-id: trunk@48671 -
 2021-02-13 22:16:59 +00:00
florian
87e1dc159d * do not mess with FPA registers if they are not available 
git-svn-id: trunk@48669 -
 2021-02-13 17:04:03 +00:00
florian
7f1aac8bd7 - armv5 never existed (without extension), removed 
git-svn-id: trunk@48652 -
 2021-02-11 21:27:12 +00:00
florian
3b49e95415 * do not initialize unncessary register allocators 
git-svn-id: trunk@48628 -
 2021-02-10 19:52:52 +00:00
yury
9b1567f054 * Corrected method's visibility. 
git-svn-id: trunk@48393 -
 2021-01-24 14:06:35 +00:00
yury
64c586b86d * Removed/ifdefed lots of unused variables. 
git-svn-id: trunk@48384 -
 2021-01-24 12:24:01 +00:00
pierre
19d5e43615 Avoid internalerror in RemoveCurrentP for arm compiler 
git-svn-id: trunk@47690 -
 2020-12-05 21:23:09 +00:00
florian
1014e53081 * patch by J. Gareth Moreton: fixes crash on ARM with -CriotR, resolves #38116 
git-svn-id: trunk@47531 -
 2020-11-22 19:47:34 +00:00
pierre
3d374727dd Move explicit typecast to after check to avoid RTE when compiled with -CR 
git-svn-id: trunk@47367 -
 2020-11-09 21:19:40 +00:00
pierre
e50a388f30 Change CLZ support for arm32 minimal CPU to armv5t according to ARM documentation in arminst.dat 
git-svn-id: trunk@47207 -
 2020-10-26 13:40:45 +00:00
pierre
3f19bd693f + Add new LastCommonAsmOp constant to arm and aarch64 CPU targets. 
* Uses this new constant to define TCommonAsmOps set type.
  + Use this constant in armgen/aoptarm MatchInstruction function,
    to avoid a range check error when compiling with -CriotR with optimization.

git-svn-id: trunk@47137 -
 2020-10-19 09:19:25 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 
git-svn-id: trunk@47103 -
 2020-10-13 19:59:01 +00:00
florian
eec51afadd * patch (with little modification) by J. Gareth Moreton: refactor ARM/Aarch64 peephole optimizer, first part of #37526 
git-svn-id: trunk@46975 -
 2020-09-27 21:05:42 +00:00
florian
28f25b2df0 * reworked usage of tcgnotnode.handle_locjump 
git-svn-id: trunk@46275 -
 2020-08-05 21:15:32 +00:00
Jonas Maebe
eb7ba1690e * mark all external assemblers using an LLVM tool using af_llvm 
+ added support for constructing target triplets
  * pass "-target triplet" when using an LLVM assembler
   o removed no longer needed $DARWINVERSION and $ARCH parameters
  * consistently use as_clang_gas when clang is used to assembler GAS-style
    assembly, and rename as_llcm_clang to as_clang_llvm (for consistency)
  * support pipe assembling when using clang on *nix in all cases

git-svn-id: trunk@45807 -
 2020-07-19 14:30:35 +00:00
florian
db250b04e0 * generate soft float code for arm vfp units which have no double operation support 
git-svn-id: trunk@45799 -
 2020-07-17 16:45:52 +00:00
pierre
bb6d4929d8 * Handle R_SUBMMWHOLE in reg_cgsize for R_MMREGISTER type 
* Disable range and overflow checking inside is_continuous_mask function.

git-svn-id: trunk@45798 -
 2020-07-17 15:27:27 +00:00
pierre
53eca29309 Also issue -mfpu option when calling GNU assembler for fpu_fpa family 
git-svn-id: trunk@45788 -
 2020-07-15 09:01:10 +00:00
Jonas Maebe
e7d1a77f9a * rename the ARM/AArch64-Darwin targets to ARM/AArch64-iOS 
* rename the m68k/PowerPC-MacOS targets to m68k/PowerPC-MacOSClassic
  * repurpose the AArch64/Darwin target for AArch64/macOS
   o make AArch64-Darwin default target for a hosted AArch64-Darwin compiler

git-svn-id: trunk@45758 -
 2020-07-10 21:52:24 +00:00
pierre
39f3a72c62 tarmunaryminusnode.pass_1 must call inherited method for system_arm_wince 
git-svn-id: trunk@45755 -
 2020-07-10 09:43:15 +00:00
pierre
96ac7f29f7 Only try to use softfpu functions when fputype is fpu_soft 
git-svn-id: trunk@45751 -
 2020-07-09 22:51:42 +00:00
pierre
cb41b22fdc Try to fix tarmunaryminusnode.pass_1 
git-svn-id: trunk@45750 -
 2020-07-09 22:50:34 +00:00
florian
c5d7e6807c * ARM: factor out TARMAsmOptimizer.OptPass1And 
git-svn-id: trunk@45536 -
 2020-05-30 20:44:19 +00:00
florian
0acae47310 * ARM: get rid of more unneeded sxtb/h uxtb/h instructions 
git-svn-id: trunk@45529 -
 2020-05-29 20:51:04 +00:00
florian
651f5cb8a1 * ARM: (V)LDM do not load from the registers in the reg. set 
git-svn-id: trunk@45525 -
 2020-05-28 21:37:05 +00:00
pierre
f2b924573a Do not use inherited first_int_to_real when arm FPU_HAS_FPA is in fpu_capabilities 
git-svn-id: trunk@45267 -
 2020-05-05 12:25:18 +00:00
nickysn
29d681168a * merged the z80 branch 
git-svn-id: trunk@45143 -
 2020-04-27 20:07:54 +00:00
florian
a084c8829f * patch by J. Gareth Moreton: refactor RemoveCurrentP 
git-svn-id: trunk@45142 -
 2020-04-27 19:27:16 +00:00
nickysn
a8fe46c0f5 + introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the 
output label to that length

git-svn-id: branches/z80@45066 -
 2020-04-25 12:59:25 +00:00
florian
8ac8c79a71 + initial support for arm-freertos largely based on patch by Michael Ring 
git-svn-id: trunk@44871 -
 2020-04-19 20:59:52 +00:00
florian
099faf2d2b * factored out and improved TARMAsmOptimizer.RedundantMovProcess 
+ AArch64: use TARMAsmOptimizer.RedundantMovProcess

git-svn-id: trunk@44799 -
 2020-04-18 21:48:25 +00:00
florian
9176efbab4 * factored out TARMAsmOptimizer.OptPass1SXTH 
* AArch64: use TARMAsmOptimizer.OptPass1SXTH

git-svn-id: trunk@44739 -
 2020-04-16 21:19:14 +00:00
florian
19a9d4c4ac * factored out TARMAsmOptimizer.OptPass1SXTB 
* AArch64: use TARMAsmOptimizer.OptPass1SXTB

git-svn-id: trunk@44738 -
 2020-04-16 21:19:13 +00:00
florian
7172397077 * factored out TARMAsmOptimizer.OptPass1UXTH 
* AArch64: use TARMAsmOptimizer.OptPass1UXTH

git-svn-id: trunk@44737 -
 2020-04-16 21:19:12 +00:00