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Commit Graph

230 Commits

Author SHA1 Message Date
pierre
38f751573a Copy TExternChain type and AddSymbol procedure to unit aasmcpu from agx86nsm unit 
git-svn-id: trunk@34079 -
 2016-07-06 06:55:31 +00:00
florian
ec92bc3390 * case of identifiers fixed 
* x86-64 uses also the mov $0,... -> xor optimization

git-svn-id: trunk@33553 -
 2016-04-24 20:01:43 +00:00
florian
406e3c4ac1 + support xgetbv instruction, resolves issue #29958 
git-svn-id: trunk@33418 -
 2016-04-03 20:53:10 +00:00
florian
8d5cc3dfa4 * (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893. 
In comparison with the original patch, support for a i386 has been added as well as a test program. 
  Further, a small issue with xbegin has been fixed

git-svn-id: trunk@33375 -
 2016-03-28 19:08:13 +00:00
nickysn
b562bcfdbd * fixed the alignment filler in code sections on i8086 to always use nops, 
instead of using the optimized instructions for 386+, which assume also a
  32-bit address and operand size, so they didn't work even on a 386+ in real
  mode

git-svn-id: trunk@33371 -
 2016-03-28 15:04:28 +00:00
nickysn
cf3230b100 - removed IF_CENTAUR and replaced it with IF_CYRIX. Rationale: only 3 Centaur - 
specific instructions were marked as CENTAUR, all the others were marked
  CYRIX, so it wasn't an accurate flag at all

git-svn-id: trunk@33326 -
 2016-03-25 17:01:11 +00:00
nickysn
9a2f5e01d7 + added range checking for the immediate operand of NEC V20/V30's instructions CLR1, SET1, NOT1 and TEST1 
git-svn-id: trunk@33322 -
 2016-03-24 16:05:11 +00:00
nickysn
0be6d062ac + added range checking for the imm4 operand of NEC V20/V30's instructions 
'EXT reg8,imm4' and 'INS reg8,imm4'

git-svn-id: trunk@33321 -
 2016-03-24 15:45:23 +00:00
nickysn
a376229d80 - removed IF_CYRIX and IF_AMD from the TODO list of instructions, that we're 
supposed to handle in the i8086 internal asm instruction level check, because
  these two flags are no longer part of the IF_PLEVEL mask, after r33316

git-svn-id: trunk@33318 -
 2016-03-23 15:24:59 +00:00
nickysn
5f87ac5d47 + added 486 to the list of supported CPUs on the i8086 and i386 targets 
git-svn-id: trunk@33317 -
 2016-03-23 15:07:56 +00:00
nickysn
867a4881ba * changed the codes of the IF_CYRIX and IF_AMD instruction flags, to avoid 
messing up the other Intel-compatible processor flag, they're used with

git-svn-id: trunk@33316 -
 2016-03-23 14:00:48 +00:00
nickysn
c061a98e93 * made the i8086 internal assembler cpu instruction set checking follow the 
asd_cpu directive (and thus, respect the {$asmcpu XXX} directive)

git-svn-id: trunk@33141 -
 2016-03-02 01:03:52 +00:00
Jonas Maebe
53052f26a0 * changed output parameter of process_ea_ref() from "out" to "var", as it is 
already partially initialised by its caller (part of mantis #29439)

git-svn-id: trunk@32968 -
 2016-01-18 22:20:26 +00:00
nickysn
439ab331e9 * factored out some of the duplicated (between x86 targets) parts of process_ea() to a common function 
git-svn-id: trunk@32940 -
 2016-01-14 18:00:37 +00:00
nickysn
db5e67c3fe + introduced a new type TRelocDataInt for use as the 'data' parameter for 
TObjData.writeReloc; on i8086 it was changed to longint to allow using 32-bit
  relocations
+ added support for writing 32-bit OMF relocations

git-svn-id: trunk@32936 -
 2016-01-13 17:57:36 +00:00
nickysn
d4c21cf13a * also check for 386+ when emitting a reference with a fs: or gs: prefix 
git-svn-id: trunk@32926 -
 2016-01-11 16:30:06 +00:00
nickysn
ef9504ffd7 * made the \325 x86 prefix to generate a 0x66 prefix on i8086, thus fixing many 
32-bit instructions on i8086, when using the internal obj writer

git-svn-id: trunk@32890 -
 2016-01-08 17:20:37 +00:00
nickysn
e6ac1a4af5 + added check for the compatibility of each instruction with the selected target 
cpu in the i8086's internal obj writer

git-svn-id: trunk@32888 -
 2016-01-08 16:44:28 +00:00
nickysn
a508f9e5d3 + added check if the selected cpu is 386+ when writing a 66h or 67h prefix in 
the i8086 internal object writer. This allows weeding out spurious 386
  instructions, as is similarly done by NASM when using it as an external
  assembler.

git-svn-id: trunk@32871 -
 2016-01-07 15:40:32 +00:00
nickysn
22b6e00147 * extracted the writing of 0x66 and 0x67 prefixes in the x86 internal assembler 
to local procedures write0x66prefix and write0x67prefix

git-svn-id: trunk@32869 -
 2016-01-07 14:18:14 +00:00
nickysn
78362ed6ae * RELOC_ABSOLUTE32 made different than RELOC_ABSOLUTE on i8086 (and fixed all 
the i8086 bugs, related to code that assumes that they are the same)
+ also added RELOC_RELATIVE32 on i8086
* RELOC_ABSOLUTE32 and RELOC_RELATIVE32 are not yet implemented in the OMF
  object writer and linker (and currently produce an internal error), but will
  be implemented in the future, as the OMF format supports both 16-bit and
  32-bit relocations

git-svn-id: trunk@32311 -
 2015-11-13 15:56:26 +00:00
yury
862348c317 * Keep the GOT offset in a virtual register for i386 non-darwin platforms. 
It fixes PIC code generation with GOT for i386 with enabled optimizations. Bugs #28667, #28668. 
  Prior the fix I have not been able to compile even RTL with -O2 due to not enough free registers, since EBX is reserved for GOT.

  It can be further optimized to teach register allocator to not spill the GOT register if possible.
  

git-svn-id: trunk@32020 -
 2015-10-12 08:02:56 +00:00
nickysn
1487236f29 + support addr_fardataseg references in the internal asm writer 
git-svn-id: trunk@31511 -
 2015-09-04 14:33:48 +00:00
nickysn
e9c790f4eb + support 'SEG' in the i8086 inline assembler 
git-svn-id: trunk@31428 -
 2015-08-26 15:57:44 +00:00
nickysn
0da38dbc79 + implemented support for the 'dgroup' (addr_dgroup) relocation type in the omf 
internal object writer

git-svn-id: trunk@30800 -
 2015-05-04 17:07:19 +00:00
nickysn
25a834087e + choose the correct version of "Jcc near" to use on i8086 (386+ or 8086+) 
depending on the specified target cpu type
+ support the \60..\62 magic codes on i8086 in the internal asm writer

git-svn-id: trunk@30613 -
 2015-04-16 19:49:22 +00:00
nickysn
bfd5670cc8 + support new magic code \23 in the internal asm writer - same as \13, but with 
the condition inverted; this will be used to simulate near conditional jumps
  on processors earlier than 386 (i.e. "Jcc near target" will be encoded as
  "JNcc short +3; JMP target")

git-svn-id: trunk@30611 -
 2015-04-16 16:53:48 +00:00
nickysn
955c29618a + support far calls and jumps in the internal asm writer 
git-svn-id: trunk@30601 -
 2015-04-15 00:12:40 +00:00
nickysn
a7e059c875 + support segment relocations in the omf writer 
git-svn-id: trunk@30600 -
 2015-04-14 22:46:01 +00:00
nickysn
f5ddd351fe * allow use of the imm8 form of 16-bit instructions on i8086 
git-svn-id: trunk@30594 -
 2015-04-14 19:14:47 +00:00
nickysn
bd460eec43 * emit 16-bit addresses on i8086 for asm codes &64..&66 in the internal asm 
git-svn-id: trunk@30580 -
 2015-04-13 22:13:15 +00:00
nickysn
22fb1a3e7e * converted all the magic nasm codes in the x86 internal asm writer from decimal 
to octal in the compiler source, so they match the strings in x86ins.dat

git-svn-id: trunk@30566 -
 2015-04-13 01:13:39 +00:00
nickysn
fe30b53e95 * use 16-bit operand types for call/jmp immediate on i8086 in taicpu.create_ot 
git-svn-id: trunk@30563 -
 2015-04-12 23:53:15 +00:00
nickysn
a25a906d56 * i8086 internal asm fixes for the 0324 and 0361 asm codes 
git-svn-id: trunk@30562 -
 2015-04-12 22:56:28 +00:00
nickysn
fd9e0d7266 * i8086 binary writer fixes for asm codes 0320..0322 
git-svn-id: trunk@30526 -
 2015-04-09 23:10:47 +00:00
nickysn
db5276af61 * i8086 binary writer fixes for asm codes 0300..0302 
git-svn-id: trunk@30525 -
 2015-04-09 22:56:47 +00:00
nickysn
0aa8e9d829 + i8086 fixes in the binary writer for asm codes 0310 and 0311 
git-svn-id: trunk@30524 -
 2015-04-09 22:47:21 +00:00
nickysn
8597208ed9 * fixed emitting a 66h prefix for push/pop of segment registers on i8086 in the internal asm writer 
git-svn-id: trunk@30523 -
 2015-04-09 22:01:24 +00:00
nickysn
ff20a3c7bc + support 16-bit addresses for codes 36..38 in the internal asm writer on i8086 
git-svn-id: trunk@30521 -
 2015-04-09 21:16:22 +00:00
nickysn
470fb65e80 + implemented aasmcpu.process_ea for i8086 
git-svn-id: trunk@30495 -
 2015-04-08 12:54:09 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
pierre
da55d9ded2 Also disable overflow where range check is disabled in aasmcpu unit 
git-svn-id: trunk@29989 -
 2015-02-24 15:58:49 +00:00
Jonas Maebe
1a949eae1f * fixed i8086 compilation 
git-svn-id: trunk@29807 -
 2015-02-23 08:51:59 +00:00
florian
5946328ed6 * CPUs not having CMOV apparently do not support the newly introduced Multibyte NOPs (Agner, Optimizing subroutines in assembly 
language, An optimization guide for x86 platforms, Page 87), so restored the 32 Bit part of the old alignment 
  bytes for use on those old CPUs and use it depending on the CPU switches

git-svn-id: trunk@29777 -
 2015-02-21 20:50:42 +00:00
florian
255c4feef6 * new code alignment fillings based on the discussion at http://www.lazarusforum.de/viewtopic.php?f=10&t=8487 
git-svn-id: trunk@29772 -
 2015-02-21 10:09:39 +00:00
florian
d6e4af8279 + applied remaining patches of Torsten Grundke: adds gather instructions of avx2 
git-svn-id: trunk@29745 -
 2015-02-17 21:43:46 +00:00
florian
d540d56908 * unified internal errors 
git-svn-id: trunk@29280 -
 2014-12-13 11:46:59 +00:00
florian
ed11244632 * improved formatting 
git-svn-id: trunk@28742 -
 2014-10-04 17:52:17 +00:00
florian
8635894de4 * merged new changes to avx2 branch (AVX2 vectory-memory support) by Torsten Grundke 
git-svn-id: trunk@28527 -
 2014-08-27 21:06:23 +00:00
Jonas Maebe
7949bebb8d * synchronised with r28168 of trunk 
git-svn-id: branches/hlcgllvm@28169 -
 2014-07-05 21:30:28 +00:00