Commit Graph

105 Commits

Author SHA1 Message Date
florian
47dcc5b05b * patch by J. Gareth Moreton, issue #36271, part 1: general rework of the jump optimizer
git-svn-id: trunk@43439 -
2019-11-10 16:11:38 +00:00
Jonas Maebe
67fc9a7853 * fixed peephole opitimizer removing some infinite loops (mantis #36139)
git-svn-id: trunk@43175 -
2019-10-12 21:39:48 +00:00
florian
9230ae5aab o overhaul-base.patch by J. Gareth Moreton, base for further patches
+ some inline directives added
  + some functions exported from units

git-svn-id: trunk@42722 -
2019-08-17 16:14:22 +00:00
Jonas Maebe
1b6425176b * synchronised with trunk till r42049
git-svn-id: branches/debug_eh@42050 -
2019-05-12 18:44:05 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would
be introduced by the next commit

git-svn-id: trunk@42046 -
2019-05-12 14:29:03 +00:00
Jonas Maebe
5d28e2156b + support for generating Dwarf CFI using .cfi_* directives
o adjust peephole optimisers so they don't remove cfi_endproc directives
     in case of tail call optimisation

git-svn-id: branches/debug_eh@41578 -
2019-03-03 17:15:03 +00:00
florian
94d7a02fae * modified patch by Gareth Moreton to pool TmpUsedRegs in the assembler optimizers, resolves #34679
git-svn-id: trunk@40938 -
2019-01-20 14:16:38 +00:00
Jonas Maebe
122d0d36d6 + volatile() expression that marks an expression as volatile
* disable matching volatile references in the assembler optimisers, so they
    can't be removed (more conservative than needed, but better than removing
    too many)
   o the CSE optimiser will ignore them by default, because they're an unknown
     inline node for it
  * also removed no longer used fpc_in_move_x and fpc_in_fillchar_x inline node
    identifiers from rtl/inc/innr.inc, and placed fpc_in_unaligned_x at the
    right place

git-svn-id: trunk@40465 -
2018-12-04 19:53:20 +00:00
florian
9b0ff05ee8 - get rid of MaxOps, it is redundant with max_operands
* MatchOpType with three operands is only available of max_operands>2

git-svn-id: trunk@40190 -
2018-11-02 21:32:29 +00:00
florian
2a016889de * skip align directives after unconditional jumps
git-svn-id: trunk@40160 -
2018-11-01 20:49:18 +00:00
pierre
0abc978cc4 Change RemoveCurrentP parameter type to tai, because GetNextInstruction does not always return a taicpu, adapt code in avr/aoptcpu unit
git-svn-id: trunk@40120 -
2018-10-31 23:15:22 +00:00
Jeppe Johansen
054bf32f1f Add RV64GC cpu type.
Fix float loading.
Fix a number of small issues with wrong operand sizes.
Fixed concatcopy code generation.
Align jump table for case statements.

git-svn-id: branches/laksen/riscv_new@39481 -
2018-07-21 22:34:42 +00:00
Jeppe Johansen
ceb38833f2 Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
git-svn-id: branches/laksen/riscv_new@39474 -
2018-07-20 08:21:15 +00:00
florian
5782acc32d * patch by J. Gareth Moreton to fix 33909
git-svn-id: trunk@39353 -
2018-07-01 12:54:30 +00:00
florian
ae950956af + TAOptObj.*PeepHoleOpts* check if p is really assigned
+ TAOptObj.RemoveCurrentP

git-svn-id: trunk@38488 -
2018-03-10 21:53:48 +00:00
florian
78878f59b1 + generic TAOptObj.AllocRegBetween
- removed x86 specific AllocRegBetween

git-svn-id: trunk@38445 -
2018-03-07 22:17:35 +00:00
florian
52510ea933 + TUsedRegs.Dump
git-svn-id: trunk@38067 -
2018-01-28 13:26:45 +00:00
florian
8315c660f4 * fix JumpTargetOp for sparc64
git-svn-id: trunk@37158 -
2017-09-09 19:36:50 +00:00
florian
7f286eb54e + define cpudelayslot: set during compiler compilation for CPUs having branch instructions with delay slot (MIPS, SPARC)
git-svn-id: trunk@36958 -
2017-08-20 17:20:38 +00:00
florian
f4718c0969 * made nop handling generic for sparc, so it is used by sparc64 as well
git-svn-id: trunk@36814 -
2017-07-29 20:06:14 +00:00
florian
b1dff29cbf * removed unused units
git-svn-id: trunk@36165 -
2017-05-09 19:53:14 +00:00
florian
e3f0b338d4 * SkipLabels moved to aoptutils
* factored out OptPass2Jmp assembler optimization
* OptPass2Jmp now used by x86-64 as well

git-svn-id: trunk@36141 -
2017-05-06 21:07:02 +00:00
nickysn
c096b1fe6b * fixed the debug output, generated by -dDEBUG_INSTRUCTIONREGISTERDEPENDENCIES
for x86 instructions, entered via inline assembler, using intel syntax
  (the low level optimizer isn't normally run on them, so it doesn't matter that
  InstructionLoadsFromReg and similar functions don't work on them, but with
  -dDEBUG_INSTRUCTIONREGISTERDEPENDENCIES it is much more convenient for
  debugging purposes to have correct data for them, because you can enter
  instructions manually and see how these functions behave)

git-svn-id: trunk@36065 -
2017-05-03 10:14:35 +00:00
nickysn
a9617b623f + print info about the registers, in which new values are written (as reported
by RegLoadedWithNewValue), when DEBUG_INSTRUCTIONREGISTERDEPENDENCIES is
  defined

git-svn-id: trunk@35996 -
2017-04-28 13:14:12 +00:00
nickysn
7ea0429d40 + added new compiler debug ifdef DEBUG_INSTRUCTIONREGISTERDEPENDENCIES, which
adds instruction register usage info to the assembly output (only register
  reads for now, but register writes will also be added later). Useful for
  debugging InstructionLoadsFromReg and other similar functions.

git-svn-id: trunk@35967 -
2017-04-27 13:40:58 +00:00
florian
b274599a47 * made some assembler optimizer methods class methods
git-svn-id: trunk@33929 -
2016-06-06 21:18:20 +00:00
florian
d05222990e * while updating used register sets, all labels can/must be skipped
git-svn-id: trunk@33909 -
2016-06-04 19:45:12 +00:00
florian
cfd49ec708 + TAOptBase.SuperRegistersEqual
+ properly implemented TAOptObj.PrePeepHoleOpts
+ properly implemented TAOptObj.PeepHoleOptPass2

git-svn-id: trunk@33654 -
2016-05-05 12:38:19 +00:00
florian
3c2dab9878 * i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same
git-svn-id: trunk@33542 -
2016-04-21 20:14:01 +00:00
florian
1266491085 o refactored some peephole optimizer code:
* updated TAOptObj.RegUsedAfterInstruction with the arm implementation and removed the arm specific implementation
  * RegLoadedWithNewValue and InstructionLoadsFromReg are now a methods of TAoptBase
  * moved RegEndOfLife to TAOptObj
* during this refactoring, fixed also TCpuAsmOptimizer.RegLoadedWithNewValue for arm regarding post/preindexed 
  memory references: those modify the register but do not load it with a new value in the sense of RegLoadedWithNewValue

git-svn-id: trunk@33000 -
2016-01-24 15:25:16 +00:00
yury
5771073e0b * Fixed general peephole optimization of conditional jumps after r30446. It has been broken, since r30446 had added some IsJumpToLabel() checks, which tests for unconditional jump, but the optimization code expects also conditional jumps.
- Renamed IsJumpToLabel() to IsJumpToLabelUncond() to avoid confusions.
  - Added IsJumpToLabel() to check for any jump to a label.
  - Added comments.

git-svn-id: trunk@32114 -
2015-10-21 15:35:54 +00:00
yury
11a9ff4a43 * Removed unused vars for mipsel compiler.
git-svn-id: trunk@31745 -
2015-09-17 15:46:30 +00:00
yury
432248cbf1 * Removed lot of unused vars.
git-svn-id: trunk@31732 -
2015-09-17 12:48:58 +00:00
Jonas Maebe
8c8657e2d5 * base optimiser support for the JVM target
o jump threading only works for unconditional branches until now,
     as conditional ones have limited offsets

git-svn-id: trunk@31448 -
2015-08-29 10:08:19 +00:00
Jeppe Johansen
03880c2f74 Added some peephole optimizations, and fixed generic unconditional jump optimizations, for AVR.
Fixed multiplication code generation for AVR controllers without mul instructions.
Added handling of the old interrupt procedure directive such that procedures with that use RETI instead of RET.

git-svn-id: trunk@31030 -
2015-06-13 12:25:11 +00:00
florian
1114089d25 * IsJumpToLabel checks number of operands
* add a few safety checks

git-svn-id: trunk@30446 -
2015-04-05 19:24:22 +00:00
Jonas Maebe
620af1732a * support for AArch64 branch forwarding
o don't forward cb(n)z, as we don't check the maxiumum offsets
   o don't forward conditional branches to global labels, as they also have a
     limited range and at least the OS X toolchain doesn't support this

git-svn-id: trunk@29929 -
2015-02-23 22:53:26 +00:00
sergei
0041024e5f * Modified FindRegAlloc() to skip branch delay slots in the same way it is done in GetNextInstruction(). This fixes processing sequences "dealloc reg; branch reg,label; NOP; alloc reg" in BuildLabelTableAndFixRegAlloc(), deallocation is now correctly moved after branch. Before this change, the last allocation was ignored, and deallocation was moved forward until another instruction using reg was encountered.
git-svn-id: trunk@28891 -
2014-10-21 20:56:37 +00:00
florian
8060d4a3f7 * when updating registers in RegUsedAfterInstruction, new reg. allocs should be ignored
git-svn-id: trunk@27711 -
2014-05-01 19:20:32 +00:00
masta
81517fdf70 Rerun peephole optimizers on the whole block
Up until now if a peephole optimizer matched we've only restarted from
the current instruction. This patch restarts optimizations on the whole
block if the previous run had at least one match.

As this can take considerable time this will only be enabled if -O3 or
higher is specified.

git-svn-id: trunk@26640 -
2014-01-31 23:21:52 +00:00
florian
0eeb3e8d49 * check if the pointer is really assigned when trying to remove unneeded jumps
git-svn-id: trunk@25867 -
2013-10-27 16:47:34 +00:00
sergei
40239e8bcc * Elaborating removal of branches with delay slots: ignore reg. deallocations that are inserted by RA between branch and its delay slot instruction.
* Also skip possible ait_marker's between branch and its immediately following target (which was preventing certain optimizations of "exit" statements on all targets because procedure's exit label is always preceded by location marker).

git-svn-id: trunk@25855 -
2013-10-26 17:45:01 +00:00
florian
2806947a8f + FindRegAllocBackward
* search reg. allocations backward in RemoveSuperfluousMove because the changed instruction could be the first one in a list

git-svn-id: trunk@25289 -
2013-08-18 18:56:56 +00:00
sergei
1c84c3edbf * Fixed label optimizer to work with MIPS, and enabled level 1 optimization for MIPS targets.
The difference in branch instruction formats is isolated in function JumpTargetOp, it is a plain function rather than a virtual method, so it can be easily inlined and, after inlining, produces the same code for non-MIPS targets as it was before change.

git-svn-id: trunk@25033 -
2013-07-03 14:40:24 +00:00
sergei
a4217da7df * Factored repeating code into separate procedure (IsJumpToLabel)
- Assigned(x) check before "x is y" is redundant because "is" operator does the same check.

git-svn-id: trunk@24901 -
2013-06-15 07:02:47 +00:00
florian
b6a4602989 * ignore alignment entries in FindLabel
git-svn-id: trunk@22306 -
2012-09-04 10:43:44 +00:00
florian
3e9baa3f47 * check also register type in FindRegalloc
git-svn-id: trunk@22195 -
2012-08-22 19:52:43 +00:00
florian
6e62fbc3d2 * more consistent updates of used registers
+ FindRegDeAlloc searching for a register deallocation
* FindRegAlloc now returns the allocation object which was found

git-svn-id: trunk@22191 -
2012-08-22 19:52:15 +00:00
florian
07e26cfb12 + TUsedRegs.Update parameter IgnoreNewAllocs so new allocs of registers can be ignored during update
git-svn-id: trunk@22188 -
2012-08-22 19:51:54 +00:00
Jonas Maebe
d472a6d5d0 * changed tregset into tcpuregisterset so it's faster and uses less memory
git-svn-id: trunk@21717 -
2012-06-26 19:01:11 +00:00