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147 Commits

Author SHA1 Message Date
florian
5b54ab2040 + zen5 architecture for completeness 2024-12-07 22:23:35 +01:00
florian
eb440e0ff1 + Zen4 for i386 2024-09-22 10:43:26 +02:00
florian
1966ce7c1c + Skylake-X for i386 2024-02-26 22:41:55 +01:00
florian
cad21584e5 + Skylake-X 2024-02-25 22:52:30 +01:00
florian
d7a486f225 * comment fixed, hint by Maxim Ganetsky 2024-02-06 22:09:52 +01:00
florian
f80f1112d4 + Zen 4 2024-02-05 23:18:07 +01:00
florian
ac6dc582be + also add x86-64 as cpu type (gcc compatibility) 2024-02-03 22:40:54 +01:00
florian
ae465fa8dc + introduce x86-64 microarchitecture levels for cpu and fpu flags 2024-01-31 22:32:57 +01:00
florian
4867d48e99 + support for .debug_loc and .debuc_loclist sections 2024-01-16 23:24:37 +01:00
J. Gareth "Curious Kit" Moreton
ede47ffea9 * New "fast 3-component LEA hint" and "Icelake" CPU options 2023-10-29 10:26:52 +00:00
J. Gareth "Curious Kit" Moreton
69c7838571 * x86: Addition of AMD CPUs: Bobcat, Jaguar, Piledriver, Excavator, Zen2 and Zen3 (and supporting flags) 2022-11-25 22:14:59 +00:00
florian
d3abd339b7 + cpu switch for zen 2022-11-11 23:45:52 +01:00
Sven/Sarah Barth
088c746d45 * reset written source lines once a section is encountered 2022-05-26 21:43:35 +02:00
florian
cc3cbbb7b9 * fix x86 compilation after my last commit 2021-10-10 10:21:21 +02:00
Yuriy Sydorov
122ed4b76a * Support for sleb128 and uleb128 constants in the NASM writer. 
* Added sleb128tostr() and uleb128tostr() methods to TExternalAssembler.
* Use these methods in assembler writers instead of code duplication.
 2021-08-16 00:40:34 +03:00
yury
64c586b86d * Removed/ifdefed lots of unused variables. 
git-svn-id: trunk@48384 -
 2021-01-24 12:24:01 +00:00
florian
bf7961a901 * fixes for nasm writer, resolves #38074 
+ test

git-svn-id: trunk@47413 -
 2020-11-13 21:39:16 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888 
git-svn-id: trunk@47103 -
 2020-10-13 19:59:01 +00:00
yury
8cc5842317 * Use TExternalAssembler.WriteComments() also by nasm and intel assembler writers. 
git-svn-id: trunk@46553 -
 2020-08-22 20:47:54 +00:00
yury
5ec489c018 * ait_varloc instructions are handled and removed by Trgobj.translate_registers() and never left for an assembler. 
git-svn-id: trunk@46541 -
 2020-08-22 10:58:21 +00:00
yury
1002a7c590 * 8086: Fixed very long section names when $HUGECODE is ON and section based smartlinking is used. 
* Added a utility function TrimStrCRC32().

git-svn-id: trunk@46511 -
 2020-08-20 16:35:27 +00:00
yury
c75953c12b * msdos: Implemented library based smartlinking of the dead stripable vectorized lists. It is enabled for the internal linker and wlink. These linkers sort sections by name by default. 
git-svn-id: trunk@46480 -
 2020-08-18 11:36:39 +00:00
yury
887de9f27c * Fixed nasm writer by adding a new line after the GLOBAL directive. 
git-svn-id: trunk@46427 -
 2020-08-14 13:10:12 +00:00
nickysn
4d428d945e + use ApplyAsmSymbolRestrictions on all symbols in the NASM writer 
git-svn-id: trunk@45308 -
 2020-05-08 00:53:05 +00:00
nickysn
a8fe46c0f5 + introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the 
output label to that length

git-svn-id: branches/z80@45066 -
 2020-04-25 12:59:25 +00:00
florian
e0041a8244 * compilation of x86 and PowerPC fixed 
git-svn-id: trunk@43158 -
 2019-10-09 19:26:59 +00:00
Jonas Maebe
3fee990218 * on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/ 
private_extern (or plain global in case of PECOFF, as the effect is
    the same there): visible across object files, but they become local
    when linked into a binary/library. This enables cross-unit inlining
    of functions accessig implementation-only symbols.

git-svn-id: trunk@42340 -
 2019-07-07 21:33:43 +00:00
florian
27ab140dd9 + gcc_except_table section 
+ support exception related sections in the default LD linker script

git-svn-id: branches/debug_eh@41285 -
 2019-02-10 17:57:48 +00:00
nickysn
45337b67fe + when using the i8086 with section based smartlinking, create OMF section 
groups, named 'CGROUP' or 'CGROUP_UNITNAME', which include all the code
  sections, that need to be put in the same segment

git-svn-id: trunk@39277 -
 2018-06-22 15:02:39 +00:00
nickysn
ab47c8b899 + introduce the omf_section_primary_group function. Use it instead of 
section_belongs_to_dgroup, to allow sections to belong to groups, other than
  dgroup.

git-svn-id: trunk@39268 -
 2018-06-21 13:21:53 +00:00
nickysn
1631d9ac0a + support segments (sections) with a primary group, other than 'DGROUP' in the 
NASM assembler writer

git-svn-id: trunk@39246 -
 2018-06-20 16:14:41 +00:00
nickysn
61e6d2afec + introduce asd_omf_linnum_line directives; they will be used for writing LINNUM 
entries in the OMF object format

git-svn-id: trunk@39007 -
 2018-05-16 17:05:02 +00:00
florian
fa3ee68004 o patch by Dávid Pethes: Fixes for compilation with nasm 2.10 and higher on Win64: 
* disable generation of RVA and SECREL32 symbols (according to comment in taiconst_type, they are win32 only)
  * use lowercase cpu names (it was changed from case-insensitive names sometime after 2.10)

git-svn-id: trunk@38579 -
 2018-03-20 21:55:01 +00:00
nickysn
1f0e311fdd + allow segment override prefixes to be used as a standalone opcode in the intel 
syntax inline assembler; this is TP7 compatible and allows compiling ugly
  code, such as 'seges; db $67,$66; lodsw'

git-svn-id: trunk@38096 -
 2018-02-01 17:31:59 +00:00
nickysn
ae92973196 + added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and 
retfq x86 instructions. These are variants of the ret instruction with the
  return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops
  a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a
  32-bit offset, followed by a 16-bit segment), etc.

git-svn-id: trunk@37571 -
 2017-11-10 16:53:29 +00:00
florian
1556599ad5 * symbols with bind type AB_EXTERNAL_INDIRECT need to be declared as EXTERN for masm/nasm etc. 
git-svn-id: trunk@37553 -
 2017-11-04 19:10:17 +00:00
nickysn
2af5c9d508 * changed type used for section alignment from byte/shortint to longint, so the 
internal object writer and the internal linker support object files with
  sections with alignment >=256

git-svn-id: trunk@37518 -
 2017-10-25 15:47:29 +00:00
nickysn
e8bbc4eef9 + support the xlat x86 instruction syntax with a memory operand. This allows 
specifying the address size (e.g. xlat byte ptr [bx] or xlat byte ptr [ebx])

git-svn-id: trunk@37478 -
 2017-10-17 16:40:06 +00:00
nickysn
4cb1a96ec1 * use get_ref_address_size in the nasm writer, when handling the parameterized 
string instructions

git-svn-id: trunk@37471 -
 2017-10-16 14:21:03 +00:00
nickysn
acfa199b09 * in the nasm writer, only output a segment prefix for the [si] operand, in 
case there's a segment operand, different that DS (the default source
  segment) for parameterized x86 string instructions

git-svn-id: trunk@37459 -
 2017-10-14 16:58:15 +00:00
nickysn
4c75b15afe * shortened the names of the is_x86_string_instruction_op, 
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op by removing 'instruction' from
  their names

git-svn-id: trunk@37451 -
 2017-10-12 15:20:22 +00:00
nickysn
e3ca2a3043 + added helper functions get_x86_string_op_si_param and get_x86_string_op_di_param 
* use get_x86_string_op_si_param in the nasm writer

git-svn-id: trunk@37450 -
 2017-10-12 15:12:40 +00:00
nickysn
2f28768d2d * simplify some code, by using is_x86_parameterized_string_instruction_op 
git-svn-id: trunk@37448 -
 2017-10-12 13:26:07 +00:00
nickysn
0fb79946a5 + added support for the parameterized versions of the x86 string instructions 
(movs, cmps, scas, lods, stos, ins, outs) in the inline asm of the i8086, i386
  and x86_64 targets. Both intel and at&t syntax is supported.
* NEC V20/V30 instruction 'ins' (available only on the i8086 target, because it
  is incompatible with 386+ instructions) renamed 'nec_ins', to avoid conflict
  with the 186+ 'ins' instruction.

git-svn-id: trunk@37446 -
 2017-10-12 00:07:02 +00:00
nickysn
c8487c4150 + added individual bits of the x86 flags register as subregisters 
git-svn-id: trunk@35955 -
 2017-04-26 13:52:52 +00:00
svenbarth
69fa837266 * NASM supports DQ already since version 2.00 (from 10 years ago) and it's already in the ait_const2str array, so use it! (doesn't mean that it works on Win64 however...) 
git-svn-id: trunk@35368 -
 2017-01-29 17:49:27 +00:00
pierre
40ff777693 * Adapt to TExternCain move to aasmcpu unit 
+ Make sure that a lone reference to DGROUP also generates a 'GROUP DGROUP' statement
  + Add %LINE support
  + Add $DEBUG for i8086 nasm

git-svn-id: trunk@34080 -
 2016-07-06 07:00:13 +00:00
nickysn
c2305809dc + added an i8086-embedded target support to the compiler (RTL and makefile 
support are not done yet)

git-svn-id: trunk@33999 -
 2016-06-17 19:15:24 +00:00
florian
90b284e169 + generate .debug_aranges sections for dwarf debug info: enables faster address to debug info translation 
git-svn-id: trunk@33454 -
 2016-04-08 20:19:59 +00:00
nickysn
5f87ac5d47 + added 486 to the list of supported CPUs on the i8086 and i386 targets 
git-svn-id: trunk@33317 -
 2016-03-23 15:07:56 +00:00