Commit Graph

2289 Commits

Author SHA1 Message Date
J. Gareth "Curious Kit" Moreton
1f178d381f * x86: PostPeepholeOptMov attempts to convert mov $0,%reg to
xor %reg,%reg and mov $-1,%reg to or $-1,%reg under
	 -Os even if the flags are in use by looking ahead.
2024-01-07 14:29:42 +00:00
J. Gareth "Curious Kit" Moreton
63879e74cd * x86: Additional TEST/CMP optimisations to optimise CMOV blocks
that aren't optimal due to register pressure
2024-01-07 14:29:42 +00:00
J. Gareth "Curious Kit" Moreton
0b6faeba68 * x86: CMOV block optimisation overhauled 2024-01-07 14:29:42 +00:00
florian
27be091c44 * more clean variable initialization 2024-01-01 19:31:04 +01:00
J. Gareth "Curious Kit" Moreton
af40ae2c91 * x86: Safety check, since after calling DoJumpOptimizations, the input may no longer be the same tai 2023-12-29 14:17:08 +00:00
J. Gareth "Curious Kit" Moreton
6fd5b86cff * x86: SkipAligns calls removed. 2023-12-29 14:17:08 +00:00
J. Gareth "Curious Kit" Moreton
ccf631eabd * x86: Fixed inefficiencies revealed in "TEST/JNE/TEST/JNE"
optimisations after SkipAligns cull.

         A variant "TEST/JNE/TEST/JE/@Lbl" optimisation now exists to
	 accommodate for an intermediate jump optimisation that prevents
	 the original optimisation from working if performed first.
2023-12-02 18:25:19 +00:00
J. Gareth "Curious Kit" Moreton
5fab6cc5e0 * Fixed internal error number clash (2022102110) 2023-11-10 18:43:55 +00:00
Pierre Muller
81157e9846 Use faster check for type of tai object 2023-11-06 19:55:07 +00:00
Pierre Muller
d53af12a6d Check that tai returned by GetNextInstruction is really a taicpu object before using an explicit typecast 2023-11-06 17:03:05 +00:00
J. Gareth "Curious Kit" Moreton
f4da88726c * x86: Factored out the MovMov2MovMov 2 optimisation to
catch an inefficiency in the "Deep MOV" optimisations
2023-11-04 22:17:40 +00:00
J. Gareth "Curious Kit" Moreton
af1eb33a75 * x86: Fixed inefficiency in the long-range MOV optimisations 2023-11-04 22:17:40 +00:00
Nikolay Nikolov
b5fa73b82c * some fixes for the x86 assembler writer, when running on a big-endian hosted platform 2023-11-02 12:25:05 +02:00
J. Gareth "Curious Kit" Moreton
ede47ffea9 * New "fast 3-component LEA hint" and "Icelake" CPU options 2023-10-29 10:26:52 +00:00
J. Gareth "Curious Kit" Moreton
44cda17674 * x86: Fixed bug in "LeaLea2Lea 2" optimisation where final offset was calculated incorrectly 2023-10-28 15:54:54 +00:00
Sven/Sarah Barth
f88ee7b2d8 * fix #40451: load the assembly symbol into a separate operand so that an offset already contained in oper isn't discarded + added test 2023-10-20 19:54:04 +02:00
florian
803a6fea24 * throw an error if instructions which needs an operand size is used with one operand being a reference without size 2023-09-16 23:25:31 +02:00
Pierre Muller
fbe64536d1 Cast properly to avoid range error 2023-09-14 10:04:02 +02:00
Sven/Sarah Barth
3b455c1cf2 * fix #40390: implement support for handling parameter names (including __SELF and __HIGH(<identifier>)) that resolve directly to registers
+ added tests
2023-09-08 17:30:32 +02:00
J. Gareth "Curious Kit" Moreton
35e52b90f5 * Added missing register allocations to SSE/AVX optimisations 2023-08-24 19:41:41 +00:00
J. Gareth "Curious Kit" Moreton
49d66b8f20 * x86: Fixed bug where incorrect SSE/AVX peephole optimisations were performed under -O3 in some situations. 2023-08-24 19:41:41 +00:00
J. Gareth "Curious Kit" Moreton
dde19c0144 * Improvement to TEST/JNE/TEST/JNE code to be more accurate where register deallocations are concerned 2023-08-12 23:43:05 +00:00
J. Gareth "Curious Kit" Moreton
699db16fe4 * x86: Fixed bug in TEST/JNE/TEST/JNE optimisation that caused bad code to be generated under -O3 2023-08-12 23:43:05 +00:00
florian
4096d9b74f * factor out subreg2opsize 2023-08-12 23:12:13 +02:00
J. Gareth "Curious Kit" Moreton
6ffa258abb * x86: Revamped OptPass2Jcc CMOV code to shrink and reuse registers as much as possible 2023-08-12 20:55:12 +00:00
J. Gareth "Curious Kit" Moreton
2a83972db8 * x86: Fixed bug where OptPass2Jcc CMOV optimisation sometimes
put the wrong-sized register into an operand (fixes i40307)
2023-08-12 20:55:12 +00:00
J. Gareth "Curious Kit" Moreton
e4d5de8d05 * x86: Fixed bug with BT optimisation where operand
sizes bigger than the register word size caused
    incorrect code generation (fixes #40358)
2023-07-21 07:27:30 +01:00
Pierre Muller
513ba3c733 Add -Aas-clang for i386/x86_64 unix targets 2023-07-19 19:00:30 +02:00
florian
1e62913183 * check properly for the supported cpu type, resolves #40298 2023-07-02 17:53:12 +02:00
Nikolay Nikolov
11712658b0 + implemented WebAssembly code generator support for funcref and externref data
types, using new register types R_FUNCREFREGISTER and R_EXTERNREFREGISTER
2023-06-07 05:25:57 +03:00
J. Gareth "Curious Kit" Moreton
e40996cd2c * Fixed bug in "JccMovJmpMov2CMovCMov" optimisation where it didn't track registers in references getting changed 2023-04-30 22:25:55 +00:00
florian
e40f997a40 * another patch to fix #40223 2023-03-31 23:45:45 +02:00
Pierre Muller
644ffa8e7a Do not always set DEBUG_AOPTCPU 2023-03-30 22:07:37 +00:00
florian
6663d5ca63 * do not replace index registers with esp/rsp, resolves #40223 2023-03-30 21:36:35 +02:00
J. Gareth "Curious Kit" Moreton
3f25438d35 * x86: TEST/Jcc/TEST optimisations can now look beyond the next instruction under -O3 2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
d372286159 * x86: RegModifiedByInstruction and RegInInstruction
are now more accurate for (I)MUL and (I)DIV.
2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
3635f7cd6f * x86: Fixed oversight in RegModifiedByInstruction not checking W0, W1 and WU-type flags 2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
b637a3a022 * x86: Fix to MOV/CMP register deallocation positioning 2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
77f53ebde3 * x86: The LEA/LEA optimisations can now work with a different
destination register and the intermediate register still in
	 use.
2023-03-08 21:54:41 +00:00
J. Gareth "Curious Kit" Moreton
931bda5633 * x86: LeaLea2Lea now handles cases where the second LEA instruction
has a second register in the reference.
2023-03-08 21:54:41 +00:00
florian
66ff7a928c + added debug messages 2023-03-08 22:54:17 +01:00
florian
bf8746ed10 * fixed comment
* shortened code
2023-03-05 21:24:50 +01:00
florian
ccbdfa9150 + x86: AND/CMP -> CMP optimiziation 2023-03-04 21:20:52 +01:00
J. Gareth "Curious Kit" Moreton
b8933dd267 * x86: Some refactoring to use aoc_ForceNewIteration instead of manually advancing p 2023-03-04 18:40:27 +00:00
J. Gareth "Curious Kit" Moreton
ecf2ad3e53 x86: Some oversights fixed where another iteration of pass 1 wasn't performed when it should have been 2023-03-03 20:47:24 +00:00
J. Gareth "Curious Kit" Moreton
4d33e5f137 * x86: OptPass1_V_MOVAP now uses GetNextInstructionUsingReg and UpdateUsedRegsBetween 2023-02-24 19:39:39 +00:00
J. Gareth "Curious Kit" Moreton
2a44ffe51b * x86: BZHI optimisation now sets the subtract and shift nodes to 'do not execute' as they are skipped over. 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
16bd996e74 * x86: 'and not' optimisation now sets the NOT node to 'do not execute' as it is skipped over 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
dd7320ec13 * x86: PostPeepholeOptCmp and PostPeepholeOptTestOr
now do a final attempt of TrySwapMovCmp to
	 clean up Pass 2 optimisations
2023-02-19 20:22:49 +00:00
J. Gareth "Curious Kit" Moreton
4d676cd6fa * x86: JccMovJmpMov2CMovCMov will no longer move
MOV instructions (fixes i40122)
2023-02-19 20:22:49 +00:00