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809549a31f
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16152 Commits

Author SHA1 Message Date
florian
809549a31f * addr nodes can be also considered in cse 
git-svn-id: trunk@26625 -
 2014-01-30 17:19:06 +00:00
florian
3a11dd1055 * create the addr node for cse with create_internal to avoid errors when taking the address of a temp. 
git-svn-id: trunk@26624 -
 2014-01-30 17:19:04 +00:00
florian
fc7dc9e54c * do cse after the init/final code has been inserted, this might enable new cse opportunities 
git-svn-id: trunk@26623 -
 2014-01-30 17:19:01 +00:00
Jeppe Johansen
257b1affaa Fixed previous fix of LsrAnd2Lsr optimization. 
Added an extra condition for <ARMv6 processors in MLA/MLS optimization.

git-svn-id: trunk@26620 -
 2014-01-29 22:22:58 +00:00
Jeppe Johansen
f773334374 Fixed LsrAnd2Lsr peephole optimization for ARM. 
git-svn-id: trunk@26619 -
 2014-01-29 21:35:28 +00:00
Jonas Maebe
859676d7d3 * fixed r26519 for darwin/x86-64, see comments (mantis #25644) 
git-svn-id: trunk@26618 -
 2014-01-29 21:26:45 +00:00
Jonas Maebe
c05da62b0e * detect static data use by record methods and methods of nested classes/ 
records, so we avoid inlining them (mantis #25598)

git-svn-id: trunk@26617 -
 2014-01-29 21:26:38 +00:00
Jonas Maebe
b611882337 * some minor formatting fixes 
git-svn-id: trunk@26616 -
 2014-01-29 19:26:17 +00:00
Jonas Maebe
a6d28b5630 * pass on the "eval" state (whether or not subexpressions should be evaluated) 
when encountering a "(" in a preprocessor expression (broken after r25465,
    mantis #25296)

git-svn-id: trunk@26615 -
 2014-01-29 19:26:12 +00:00
Jonas Maebe
2f741121e9 * don't give an internal error when freeing an error token in the preprocessor 
(mantis #25573)

git-svn-id: trunk@26614 -
 2014-01-29 19:26:03 +00:00
Jeppe Johansen
3b4f59c316 Fixed MLA/MLS peephole optimization and moved it to the generic ARM peephole optimizer. 
git-svn-id: trunk@26613 -
 2014-01-29 17:28:13 +00:00
Jeppe Johansen
184baa3f99 Fixed invalid peephole optimization of ADD/SUB(SP) instructions for ARMv7*M targets. 
git-svn-id: trunk@26612 -
 2014-01-29 17:12:57 +00:00
Jonas Maebe
2adfb6cdda * don't endlessly recurse when printing the typename of a procvardef that 
refers to itself via a pointerdef in its parameter or result type(s)
    (mantis #25551)

git-svn-id: trunk@26610 -
 2014-01-28 20:14:31 +00:00
Jonas Maebe
6d5bef3e1d * removed code duplication in tpointerdef.GetTypeName 
git-svn-id: trunk@26609 -
 2014-01-28 20:14:28 +00:00
Jonas Maebe
89d97a3c2e * only consider tc_pointer_to_array typeconversions to determine whether a 
pointer->array type conversion implies an implicit dereference operation
    (mantis #25622)

git-svn-id: trunk@26608 -
 2014-01-28 20:14:24 +00:00
Jonas Maebe
9c4505045b * fixed formatting 
git-svn-id: trunk@26607 -
 2014-01-28 20:14:10 +00:00
masta
9e0af11ad8 Rerun the peephole optimizer after removing the current instruction. 
This lets the optimizer pickup on more possible optimizations.

git-svn-id: trunk@26606 -
 2014-01-28 16:00:51 +00:00
masta
57ff589ec7 Always set p to the next instruction after removing p from asml. 
Some time ago we introduced GetNextInstructionUsingReg, which might
return an instruction a couple of instructions away from our current
location. Most of the code then just returned the new instruction (hp1)
instead of the instruction following p. This could prevent the peephole
optimizer from finding possible optimizations.

git-svn-id: trunk@26605 -
 2014-01-28 16:00:47 +00:00
masta
c644503daf Add MovLdr2Ldr peephole optimizer for ARM 
The existing LdrLdr2LdrMov optimizer will generate a lot of
sequences like this:

ldr regA, [...]
mov regB, regA
ldr regB, [regB, ...]

this now gets changed to

ldr regA, [...]
ldr regB, [regA, ...]

this saves an instruction and might open up more possibilities for the load scheduler.

git-svn-id: trunk@26603 -
 2014-01-28 13:20:35 +00:00
masta
77d12f61a2 Handle LDRD and STRD correctly in RegInInstruction for ARM 
LDRD and STRD only have the first even numbered register in their instruction operands,
this additional code will also check for the register following it.
Example:
  ldrd r0, [r13]

The old code will only detect r0 as in use, not the implicit r1.

git-svn-id: trunk@26602 -
 2014-01-28 13:20:26 +00:00
pierre
754790f641 Use new static library not supproted message 
git-svn-id: trunk@26598 -
 2014-01-27 22:29:07 +00:00
pierre
6feab20b01 regenerated after: Add different message for static libraary not supported 
git-svn-id: trunk@26597 -
 2014-01-27 22:28:29 +00:00
pierre
b4d0cf5593 * Add different message for static libraary not supported 
git-svn-id: trunk@26596 -
 2014-01-27 22:26:29 +00:00
sergei
ff3fe06af9 * Changed condition around declaration of 'cgpara' to be the same as around its usage. 
- Removed one of $ifdef's.

git-svn-id: trunk@26595 -
 2014-01-27 01:41:51 +00:00
nickysn
5832c323b1 - don't define FPC_HAS_INTERNAL_BSF and FPC_HAS_INTERNAL_BSR on i8086. BSF/BSR 
is 386+ only and the internal handling was not used anyway on i8086, due to
  some nested defines in systemh.inc missing on i8086.

git-svn-id: trunk@26592 -
 2014-01-26 20:02:15 +00:00
nickysn
5e0359d389 * 16/8-bit ALU fix for 64-bit pred/succ after r26580 
git-svn-id: trunk@26590 -
 2014-01-26 15:44:58 +00:00
florian
48ae2d215a + concatcopy variants using sse and avx, only activated if optimization for size is done because at least on an i7-4770 it has shown no benefit 
git-svn-id: trunk@26588 -
 2014-01-26 12:37:54 +00:00
florian
060aa2a7fe + SSE and AVX unit cpu flags 
git-svn-id: trunk@26587 -
 2014-01-26 12:37:52 +00:00
florian
2ec5a649d7 * set Ch_* for more operations 
* Ch_* flags for VMOVSD and VMOVSS are now set for the 2 operand variants

git-svn-id: trunk@26586 -
 2014-01-26 12:37:50 +00:00
nickysn
e83ef05b74 - disable cs_opt_nodecse from -O2 on i8086, because it breaks building packages 
since r26579

git-svn-id: trunk@26583 -
 2014-01-26 02:08:08 +00:00
florian
c44b5d1043 * take care of tempinitcode when creating def information for tempcreatenodes 
git-svn-id: trunk@26581 -
 2014-01-25 09:40:51 +00:00
florian
cb8100bccf * do not reuse registers in prec/succ 
git-svn-id: trunk@26580 -
 2014-01-25 09:40:48 +00:00
florian
1b355ce1e4 * apply cse to all non-regable variables if possible 
git-svn-id: trunk@26579 -
 2014-01-25 08:50:13 +00:00
nickysn
be85998313 * fixes in optimize_op_const: 
* Do the sign extension of the 'a' parameter internally in a local variable,
    so that it does not become visible outside the function.
  * Use a zero extended version of 'a' (instead of sign extension) for the
    parameter of ispowerof2().

git-svn-id: trunk@26571 -
 2014-01-23 14:05:11 +00:00
Károly Balogh
2791e8ad15 use optimized cg loading functions in 64bit compares instead of hardcoded move.ls (move.l #X,dn is 48bit long, clr.l/moveq.l is 16bit long) 
git-svn-id: trunk@26570 -
 2014-01-23 03:03:44 +00:00
Károly Balogh
667ec17cae tiny optimization for clearing address regs 
git-svn-id: trunk@26569 -
 2014-01-23 02:29:45 +00:00
Károly Balogh
047395df5f implemented add/sub ops in a_op_reg_ref, since these are used often. also fixed up reference handling in a_op_const_ref a bit 
git-svn-id: trunk@26568 -
 2014-01-23 02:07:24 +00:00
Károly Balogh
cd4bb364e5 reenabled and fixed up tcg68k.op_const_ref a bit 
git-svn-id: trunk@26567 -
 2014-01-22 23:15:01 +00:00
sergei
534ecbda9f * SPARC: r26561 caused a_op_const_reg_reg used for zero-extending 8-bit values to be optimized away. Fixed by replacing it with an explicit instruction. 
git-svn-id: trunk@26566 -
 2014-01-22 21:37:37 +00:00
masta
0736bf4ded Try to change typical constant AND-masking operations into shifts for ARM 
If the constant only contains a string of ones starting from lsb or msb
we can shift out the bits accordingly, opening up some possibilities for
the peephole optimizer to fold at least one shift into another
operation.

git-svn-id: trunk@26565 -
 2014-01-22 20:21:02 +00:00
nickysn
85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1) 
git-svn-id: trunk@26561 -
 2014-01-22 15:00:34 +00:00
sergei
ab44638635 + SPARC: initial peephole optimizer. 
git-svn-id: trunk@26555 -
 2014-01-21 14:22:59 +00:00
pierre
42140bd11f Add forgotten new file, should fix bug report 25571 
git-svn-id: trunk@26554 -
 2014-01-21 14:17:29 +00:00
sergei
cda81e1d18 * SPARC: emit "x shl 1" as "x+x", it yields shorter code. 
git-svn-id: trunk@26553 -
 2014-01-21 13:50:35 +00:00
pierre
408dc2d2c1 Regenerated after: Add -h output for new assemblers 
git-svn-id: trunk@26552 -
 2014-01-21 09:01:21 +00:00
pierre
af83a74544 Add -h output for new assemblers 
git-svn-id: trunk@26551 -
 2014-01-21 09:00:53 +00:00
pierre
9fc9f4bdba Use new as_i8086_nasmobj as external assembler for msdos target 
git-svn-id: trunk@26549 -
 2014-01-21 00:27:42 +00:00
pierre
3327d508ee Enable nasm assembler for x86_64 cpu 
git-svn-id: trunk@26548 -
 2014-01-21 00:26:49 +00:00
pierre
045f161012 Separate out nasm assembler for i8086, i386 and x86_64 cpus, also separte based on target object format 
git-svn-id: trunk@26547 -
 2014-01-21 00:26:08 +00:00
pierre
dfd37aae43 Add several x86 assemblers: yasm, and target specialized nasm, including for x86_64 
git-svn-id: trunk@26546 -
 2014-01-21 00:23:51 +00:00