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191 Commits

Author SHA1 Message Date
nickysn
470fb65e80 + implemented aasmcpu.process_ea for i8086 
git-svn-id: trunk@30495 -
 2015-04-08 12:54:09 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095 
git-svn-id: branches/hlcgllvm@30101 -
 2015-03-05 20:32:15 +00:00
pierre
da55d9ded2 Also disable overflow where range check is disabled in aasmcpu unit 
git-svn-id: trunk@29989 -
 2015-02-24 15:58:49 +00:00
Jonas Maebe
1a949eae1f * fixed i8086 compilation 
git-svn-id: trunk@29807 -
 2015-02-23 08:51:59 +00:00
florian
5946328ed6 * CPUs not having CMOV apparently do not support the newly introduced Multibyte NOPs (Agner, Optimizing subroutines in assembly 
language, An optimization guide for x86 platforms, Page 87), so restored the 32 Bit part of the old alignment 
  bytes for use on those old CPUs and use it depending on the CPU switches

git-svn-id: trunk@29777 -
 2015-02-21 20:50:42 +00:00
florian
255c4feef6 * new code alignment fillings based on the discussion at http://www.lazarusforum.de/viewtopic.php?f=10&t=8487 
git-svn-id: trunk@29772 -
 2015-02-21 10:09:39 +00:00
florian
d6e4af8279 + applied remaining patches of Torsten Grundke: adds gather instructions of avx2 
git-svn-id: trunk@29745 -
 2015-02-17 21:43:46 +00:00
florian
d540d56908 * unified internal errors 
git-svn-id: trunk@29280 -
 2014-12-13 11:46:59 +00:00
florian
ed11244632 * improved formatting 
git-svn-id: trunk@28742 -
 2014-10-04 17:52:17 +00:00
florian
8635894de4 * merged new changes to avx2 branch (AVX2 vectory-memory support) by Torsten Grundke 
git-svn-id: trunk@28527 -
 2014-08-27 21:06:23 +00:00
Jonas Maebe
7949bebb8d * synchronised with r28168 of trunk 
git-svn-id: branches/hlcgllvm@28169 -
 2014-07-05 21:30:28 +00:00
sergei
e7cd5319f0 * Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode. 
git-svn-id: trunk@27933 -
 2014-06-11 12:51:38 +00:00
Jonas Maebe
bacd303208 * synchronized with trunk up to r27758 
git-svn-id: branches/hlcgllvm@27779 -
 2014-05-12 16:12:34 +00:00
michael
36c662f69f * Extention -> extension (By Reinier, bug ID #25979) 
git-svn-id: trunk@27750 -
 2014-05-10 15:29:29 +00:00
nickysn
c9f8703679 + set ref.segment to NR_SS for all temps/localvars on i8086. This allows the 
segment to survive e.g. several nested vecnodes, which cause the base register
  to change from BP to something else. In the cases where the ss: prefix is not
  needed, it is removed by make_simple_ref.
+ remove the ss: prefix in the several cases where make_simple_ref isn't called
  (namely spilling and tcg8086.a_call_reg_far)

git-svn-id: trunk@27714 -
 2014-05-01 21:18:47 +00:00
florian
842e027a9f + prove of concept how FMA4 could be supported in inline assembler 
git-svn-id: trunk@27214 -
 2014-03-20 21:25:38 +00:00
florian
a79be2b05c + support for FMA instructions in inline assembler 
+ extended avx test code with FMA

git-svn-id: trunk@27209 -
 2014-03-20 20:06:56 +00:00
florian
aa107b914c * merged avx2 branch, developed by Torsten Grundke 
git-svn-id: trunk@27200 -
 2014-03-20 12:03:52 +00:00
Jonas Maebe
e9268a0a14 * synchronised with trunk up till r26975 
git-svn-id: branches/hlcgllvm@26976 -
 2014-03-06 21:36:58 +00:00
nickysn
c83032992d * more fixes to the 3-op IMUL spilling: 
o Return the correct operation type for all forms of IMUL in
    taicpu.spilling_get_operation_type
  o Properly support 3-op IMUL in trgx86.do_spill_replace

git-svn-id: trunk@26514 -
 2014-01-18 21:46:13 +00:00
sergei
e6a9f3b15b * Fixed spilling of 3-operand IMUL instruction (went unnoticed this far because such instructions were not emitted by compiler). 
git-svn-id: trunk@26510 -
 2014-01-18 19:21:48 +00:00
florian
4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 
git-svn-id: trunk@26161 -
 2013-12-01 17:02:08 +00:00
Jonas Maebe
1df3039424 + LLVM temp allocator based on new R_TEMPREGISTER register class. For every 
temp we allocate, we set the base register to a newly allocated
    R_TEMPREGISTER. This allows for uniquely identifying a temp even if its
    offset is modified.

git-svn-id: branches/hlcgllvm@26033 -
 2013-11-11 11:14:59 +00:00
florian
f132a804d6 + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics 
git-svn-id: trunk@25909 -
 2013-11-01 19:01:39 +00:00
nickysn
f6e846c574 + added the NEC V20/V30 instructions 
git-svn-id: trunk@25750 -
 2013-10-11 21:27:56 +00:00
sergei
5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 
git-svn-id: trunk@25627 -
 2013-10-03 08:08:04 +00:00
sergei
2c79314d59 * IF_SANDYBRIDGE designates CPU family, not feature. Mostly a cosmetic change, since we don't use these flags for anything. 
git-svn-id: trunk@25626 -
 2013-10-03 06:06:34 +00:00
sergei
7e6a7f20cc - Removed unused variables and dead assignments. 
git-svn-id: trunk@25424 -
 2013-09-05 09:05:56 +00:00
florian
9b6094a58c + added a few BMI instructions to see if they can be encoded 
git-svn-id: trunk@24907 -
 2013-06-16 09:35:21 +00:00
florian
e81d2d1f3b * basic avx support for floating point operations (use -Cfavx to activate) 
git-svn-id: trunk@24896 -
 2013-06-14 20:03:01 +00:00
nickysn
92afd7cccd + R_SUBH support added in x86/aasmcpu.spilling_create_load and spilling_create_store 
git-svn-id: trunk@24477 -
 2013-05-09 14:10:45 +00:00
nickysn
fef3732884 * i8086 compilation fixes 
git-svn-id: branches/i8086@24244 -
 2013-04-14 16:34:02 +00:00
florian
ad0b0455d8 * extended comment 
git-svn-id: branches/i8086@24152 -
 2013-04-04 21:06:10 +00:00
nickysn
c3aaa37c0c * fixed a bug which caused non commutative fpu instructions to be wrong when using an intel-style external assembler and compiling a smartlinked unit 
git-svn-id: branches/i8086@24151 -
 2013-04-04 20:17:50 +00:00
florian
24f9d0d770 * cancel warning on i8086 because it stops compilation (the compiler is normally build with -Sew) 
git-svn-id: branches/i8086@23933 -
 2013-03-19 20:10:52 +00:00
Jonas Maebe
5d628b29bb * set the subregsize of OS_M64 SSE registers to R_SUBQ so we can 
differentiate between 64 bit and 128 bit (R_SUBMMWHOLE) SSE vector regs,
    and support spilling/assembling for R_SUBQ SSE registers (8 bytes)
    (mantis #23962)

    We currently never use the full 128 bit of an SSE register, and
    spilling for those hasn't been implemented yet either (R_SUBMMWHOLE
    SSE regs are spilled into a 4-byte temp currently -> can overwrite data)

git-svn-id: trunk@23700 -
 2013-03-06 12:42:46 +00:00
florian
a499a30ca9 * fixes to avx support by Torsten Grundke 
git-svn-id: trunk@22773 -
 2012-10-19 16:45:53 +00:00
florian
283ff05127 * merged avx support in inline assembler developed by Torsten Grundke 
git-svn-id: trunk@22568 -
 2012-10-06 19:47:18 +00:00
sergei
21524c56c6 * If subtrahend symbol belongs to current section, generate a RELATIVE relocation instead of PIC_PAIR. Now the corresponding relative expressions in assembler operands compile correctly on all i386 targets (and x86_64 too, although such feature is less important there). 
+ Test.

git-svn-id: trunk@21864 -
 2012-07-11 09:05:21 +00:00
Jonas Maebe
313e976256 * avoid spurious range errors due to longint+qword expressions (results in 
both values getting converted to a qword, which causes a range error
    in case the longint is smaller than 0)

git-svn-id: trunk@21621 -
 2012-06-15 16:58:27 +00:00
paul
4b24a58871 compiler: remove/hide few unused variables 
git-svn-id: trunk@18912 -
 2011-08-30 01:32:23 +00:00
florian
87696a4b70 * cr*, dr*, tr* registers are 64 bit on x86-64 
git-svn-id: trunk@18243 -
 2011-08-17 11:42:11 +00:00
florian
8308b46a94 + support for assembler instructions with four operands 
+ support for insertq, resolves #19910

git-svn-id: trunk@18206 -
 2011-08-14 16:46:35 +00:00
pierre
8a0ed92957 * Remove useless code for i386 
git-svn-id: trunk@17806 -
 2011-06-23 14:50:31 +00:00
sergei
354d0520b7 + x86 assembler: fixed MOVABS instruction (it is a x86_64-only subset of MOV with 8-byte immediates/offsets) and same-form encodings of MOV instruction. 
git-svn-id: trunk@17666 -
 2011-06-05 17:32:18 +00:00
sergei
d89aeeadaf x86 assembler: 
* Adjust rip-relative offsets using values known from calcsize, instead of reinterpreting the tail of instruction. This is simpler and remains the same regardless of particular codes used in opcode table.
* Reduced maxinfolen to 8.
- 'jmp imm64' and 64-bit versions of 'in' do not exist, removed.

git-svn-id: trunk@17546 -
 2011-05-23 20:43:50 +00:00
sergei
9e8a31193b x86 assembler: 
* Optimized the opcode representation of movq and remaining 3DNow instructions
* Disallow immediates not fitting in 32 bits (Mantis #14685) + test
* Disallow push/pop with 32-bit operands in x86_64 + test

git-svn-id: trunk@17490 -
 2011-05-17 20:06:12 +00:00
sergei
d908fb42f7 x86 assembler fixes: 
* Factored repeating REX operations into a separate function.
* Fixed instruction matching bug which was preventing compilation of 3-operand SIMD instructions with RIP-relative operand + test.
* Do not adjust offset of RIP-relative reference if it is a literal number, this was causing 0x123(%rip) to assemble as 0x122(%rip) in 3-operand instructions. Now tasm2.pp is the same with and without -Aas. Also fixed the expected result, improved verbosity of diagnostic and removed %norun, so it is actually executed.
+ Disallow high-byte registers in instructions requiring REX + test.

git-svn-id: trunk@17478 -
 2011-05-16 20:18:03 +00:00
sergei
86d0c7f4c5 * x86 assembler: write REX prefix before the first literal byte of instruction (this becomes possible once the instruction table has all $66,$F2,$F3 prefixes changed to non-literal control codes). This way it is no longer necessary to manually specify position of REX in every instruction entry (code \323 becomes obsolete), and the situation when REX is not written (IE 200603191) is hopefully gone forever. 
git-svn-id: trunk@17456 -
 2011-05-14 16:02:31 +00:00
sergei
6d0d8734e0 * x86 assembler: operand type declarations rewritten using expressions instead of literal numbers where possible. Reassigned bit values to match the current NASM (the values themselves don't actually matter and can be chosen pretty arbitrary. What matters is the clean separation between different parts of the bitmask. In particular, the old value of XMM register class bit was equal to OT_BITS80, causing matching algorithm to effectively ignore it and accept e.g. MMX registers in place of XMM ones, part of Mantis #14387). 
* Fixed matching of memory references with OT_XMMRM and OT_MMXRM.

git-svn-id: trunk@17449 -
 2011-05-14 00:07:07 +00:00