Commit Graph

18 Commits

Author SHA1 Message Date
Jonas Maebe
e02e742997 * removed OS check when loading the address of a symbol on AArch64, it's
probably the same everywhere

git-svn-id: trunk@30900 -
2015-05-24 16:50:13 +00:00
Jonas Maebe
8628d50aba + Linux/AArch64 compiler support (patch by Edmund Grimley Evans)
git-svn-id: trunk@30893 -
2015-05-22 09:25:05 +00:00
Jonas Maebe
49aef02ef2 * fixed register size of uxtb in case of a 64 bit scan operation
(mantis #27954)

git-svn-id: trunk@30724 -
2015-04-25 16:36:45 +00:00
Jonas Maebe
61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm)
git-svn-id: trunk@30429 -
2015-04-04 14:29:16 +00:00
Jonas Maebe
67b8aceaee * synchronized with privatetrunk till r30095
git-svn-id: branches/hlcgllvm@30101 -
2015-03-05 20:32:15 +00:00
Jonas Maebe
879afbb7be * removed -Oodfa warnings
git-svn-id: trunk@29986 -
2015-02-23 22:57:24 +00:00
Jonas Maebe
2ab7f5c35d * moved x86-specific requirements from the generic bsr/bsf code to the
x86 code generator (register size constraints)

git-svn-id: trunk@29984 -
2015-02-23 22:57:18 +00:00
Jonas Maebe
a8d05b66e2 + AArch64 internal bsf/bsr support
git-svn-id: trunk@29979 -
2015-02-23 22:57:02 +00:00
Jonas Maebe
b40a4d1b5a + support for "xor mmreg,mmreg" for initialising global floating point
regvars

git-svn-id: trunk@29978 -
2015-02-23 22:56:59 +00:00
Jonas Maebe
b5b7e0f338 * ensure that 64->32 bit truncations cannot be optimized away by the
register allocator on AArch64 + test (did not get caught by existing
    tests)

git-svn-id: trunk@29965 -
2015-02-23 22:55:54 +00:00
Jonas Maebe
c9de3b2ecd * use the zero register for a_load_const_ref(0)
git-svn-id: trunk@29960 -
2015-02-23 22:55:29 +00:00
Jonas Maebe
07455fb889 + inlined versions of concatcopy
git-svn-id: trunk@29959 -
2015-02-23 22:55:26 +00:00
Jonas Maebe
966a851997 + a_loadmm_intreg_reg() and a_loadmm_reg_intreg() implementations
git-svn-id: trunk@29939 -
2015-02-23 22:54:06 +00:00
Jonas Maebe
41fba0c4f7 * switched to using the stack pointer as base register for the temp allocator
instead of the frame pointer register:
      1) we exactly know the offsets of the temps from the stack pointer
         after pass 1 (based on the require parameter stack size for called
         routines), while we don't know it for the frame pointer (it depends
         on the number of saved registers)
      2) temp offsets from the stack pointer are positive while those from
         the frame pointer are negative, and we can directly encode much
         bigger positive offsets in the instructions
   o move the stack pointer register to a virtual register in
     loadparentfpn, because many instructions cannot directly operate
     on/with the stack pointer
   o add the necessary register interference edges for the stack pointer
     register

git-svn-id: trunk@29938 -
2015-02-23 22:54:03 +00:00
Jonas Maebe
7fc9d775df + support for @page and @pageoffs addressing on AArch64: these are PIC
references that directly take the address of a symbol, rather than
    of its GOT entry
   o use these addressing modes to access local symbols

git-svn-id: trunk@29932 -
2015-02-23 22:53:43 +00:00
Jonas Maebe
d246ababff + condition code operand for aarch64
+ taicpu.op_reg_cond() constructor
  * use this operand for cset

git-svn-id: trunk@29889 -
2015-02-23 22:51:19 +00:00
Jonas Maebe
c244daaafb * don't initialize the fpu register allocator, it is/must not be used on
AArch64

git-svn-id: trunk@29854 -
2015-02-23 22:49:31 +00:00
Jonas Maebe
ab186f7892 + initial implementation of aarch64 code generator
git-svn-id: trunk@29853 -
2015-02-23 22:49:28 +00:00