paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-04-27 23:23:44 +02:00
Code Issues Packages Projects Releases Wiki Activity
53,029 Commits 100 Branches 75 Tags 299 MiB
a66016026b
Commit Graph

302 Commits

Author SHA1 Message Date
florian
a66016026b * handle bitpacked booleans more efficiently 
git-svn-id: trunk@38509 -
 2018-03-12 22:05:34 +00:00
florian
11ef1d17c2 * fix register allocation for MovOp2Op and PushPushPopPop2MovMov 
* fix MovOp2Op for ST/STS
* fix register book keeping for MovMov2Movw

git-svn-id: trunk@38492 -
 2018-03-10 21:53:55 +00:00
florian
9fc0f28ae4 * handle movw in TCpuAsmOptimizer.RegInInstruction 
git-svn-id: trunk@38491 -
 2018-03-10 21:53:54 +00:00
florian
ee252d0ecd + allocate real registers properly in tcgavr 
git-svn-id: trunk@38490 -
 2018-03-10 21:53:52 +00:00
florian
61660375ce + AVR PeepHoleOptPass1Cpu makes use of TAOptObj.RemoveCurrentP to track register usage properly 
git-svn-id: trunk@38489 -
 2018-03-10 21:53:50 +00:00
florian
63ffb02b34 + Mov2Nop 
git-svn-id: trunk@38487 -
 2018-03-10 21:53:46 +00:00
florian
93a0cef65d * improved OpCp2Op 
git-svn-id: trunk@38486 -
 2018-03-10 21:53:45 +00:00
florian
52cb8fbb98 + AddAdc2Add 
+ SubSbc2Sub

git-svn-id: trunk@38485 -
 2018-03-10 21:53:43 +00:00
florian
3a81ccf48b * simplify tcgavr.a_op_reg_reg_internal 
git-svn-id: trunk@38484 -
 2018-03-10 21:53:41 +00:00
florian
23722a2f95 * correctly negate 8 bit values on avr, resolves #33322 
git-svn-id: trunk@38407 -
 2018-03-04 16:28:52 +00:00
florian
62df4a4083 * patch by Christo Crause: more descriptive error message when BRxx destination out of reach 
git-svn-id: trunk@38340 -
 2018-02-25 15:31:17 +00:00
florian
5b16a84de1 + RCallReg2RJmp optimization 
git-svn-id: trunk@38318 -
 2018-02-22 20:19:03 +00:00
florian
d0dd3bd74e * patch by Christo Crause to support ~ in att assembler 
* allow -128 to 255 as a constant for instructions taking a byte sized constants (this is also what GNU As accepts), resolves #32039

git-svn-id: trunk@38316 -
 2018-02-22 20:14:56 +00:00
florian
90051fd7d2 * better suitable error message for out of range constants 
git-svn-id: trunk@38290 -
 2018-02-19 21:19:08 +00:00
florian
4cb9ad7e01 * patch (indention adapted) by Christo Crause to check avr inline assembler, resolves also #32261 
git-svn-id: trunk@38286 -
 2018-02-18 21:58:04 +00:00
florian
055a49b202 * patch by Christo Crause: the subarch type for atmega 8, 8A, 16 & 32 was incorrect. Atmega8A was also listed under the wrong subarch type in the makefile, also fixed. 
* atmega8a needs to use rjmp now

git-svn-id: trunk@38282 -
 2018-02-18 10:54:59 +00:00
florian
cd41312a8f * fixes not(<qwordbool>) on arm 
* fixes not(<(q/l)wordbool>) on avr

git-svn-id: trunk@38263 -
 2018-02-16 22:38:35 +00:00
florian
311bcd4c08 * do not destroy flags while clearing R1, resolves #33170 
git-svn-id: trunk@38241 -
 2018-02-14 19:28:33 +00:00
florian
291ee4b562 * clear r1 (and save/restore) in interrupt routines on avr 
+ generate no entry/exit code except ret for empty subroutines

git-svn-id: trunk@38233 -
 2018-02-13 17:47:23 +00:00
florian
6b5a514148 * based on a patch by Christo Crause: in finalizeavrcode, ignore assembler breq statements taking an absolute value, resolves #32109 
git-svn-id: trunk@38089 -
 2018-01-31 18:38:33 +00:00
florian
0662b611ca * patch by Christo Crause: prevent that the compiler converts breq into jmp in inline assembler blocks, resolves #32949 
git-svn-id: trunk@38088 -
 2018-01-31 18:34:42 +00:00
florian
10516f21f8 * patch by Christo Crause to resolve #33098: AVR - LDS assembler instruction with absolute address gives compiler error 
git-svn-id: trunk@38082 -
 2018-01-30 20:22:42 +00:00
florian
796eb542be * LDD/STD need always an offset, resolves #33086 
git-svn-id: trunk@38072 -
 2018-01-28 21:06:13 +00:00
Jonas Maebe
1b66995754 * factored out check to determine whether a variable can be subscripted in 
inline assembly, and fixed check after r35959 (mantis #32318)
   o can also subscript parameters passed by value on the stack
   o can also subscript local variables, the parameters passed by reference
     that are subsequently copied into a local

git-svn-id: trunk@37886 -
 2018-01-01 14:29:21 +00:00
Jeppe Johansen
a7d3d2d298 Fixed internal error in case inline assembler constants are used. 
git-svn-id: trunk@37859 -
 2017-12-29 11:50:36 +00:00
Jeppe Johansen
4a169e6b1a Changed subarch of at90pwm161 
git-svn-id: trunk@37858 -
 2017-12-29 11:30:35 +00:00
florian
0f51cf8546 * avr: correctly write references to nil, resolves #32821 
git-svn-id: trunk@37838 -
 2017-12-28 10:32:16 +00:00
florian
46ab35edb3 * apply MovOpMov2Op also to inc and dec 
* made core more readable

git-svn-id: trunk@37624 -
 2017-11-26 15:28:44 +00:00
florian
cb087279d6 * do not generate an andi if the constant is 255 
git-svn-id: trunk@37608 -
 2017-11-19 18:05:21 +00:00
florian
366360d36c * LdiMov/Cp2Ldi/Cpi may not be performed if reg0=reg1 
* cleanup of MovOp2Op
* fixed MovMov2Mov

git-svn-id: trunk@37607 -
 2017-11-19 18:05:19 +00:00
florian
ad01f059e8 * after a LdiMov/Cp2Ldi/Cpi optimization, the compiler should not continue to optimize this instruction because then reg. alloc info is wrong 
git-svn-id: trunk@37604 -
 2017-11-19 18:05:14 +00:00
florian
c7d5525b56 + implemented some AVR specific intrinsics 
git-svn-id: trunk@37544 -
 2017-11-01 16:33:34 +00:00
florian
3d3298f64d * write absolute references correctly on avr, resolves #32040 
git-svn-id: trunk@37419 -
 2017-10-07 21:09:20 +00:00
florian
4cf2a2672a changes to fix #32043 
* changed most of the variables in the assembler readers used to store constants from aint to tcgint 
  as aint has only the size of the accumular while some CPUs (AVR) allow larger constants in instructions
+ allow access to absolute symbols with address type in inline assembler
* allow absolute addresses in avr inline assembler
+ tests

git-svn-id: trunk@37411 -
 2017-10-06 21:07:19 +00:00
florian
7817102727 * patch by Christo Crause to implement 8 bit multiplications for "mul-less" avr types, resolves issue #31925 
git-svn-id: trunk@37380 -
 2017-10-01 20:34:44 +00:00
florian
1c69ae6a15 handle correctly "reg+const" operands in avr assembler, fixes issue #32016 
git-svn-id: trunk@37328 -
 2017-09-26 20:14:41 +00:00
florian
9ef646e3c5 * fix avr for new GetNextReg behaviour 
* some wrong GetNextReg usage in the avr code generator fixed

git-svn-id: trunk@37316 -
 2017-09-24 20:51:05 +00:00
nickysn
db09759763 * also integrated the getnextreg() implementation for 8-bit and 16-bit alus from 
the avr and i8086 code generators into the base tcg class

git-svn-id: trunk@37182 -
 2017-09-11 15:47:39 +00:00
nickysn
cf28b202eb * integrated the getintregister() implementation for 8-bit and 16-bit alus from 
the avr and i8086 code generators into the base tcg class (so it can be reused
  by other 8-bit and 16-bit targets)

git-svn-id: trunk@37181 -
 2017-09-11 15:23:59 +00:00
nickysn
ddba821561 * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved 
from cpubase unit to a method in the tcg class. The reason for doing that is
  that this is now a standard part of the 16-bit and 8-bit code generators and
  moving to the tcg class allows doing extra checks (not done yet, but for
  example, in the future, we can keep track of whether there was an extra
  register allocated with getintregister and halt with an internalerror in case
  GetNextReg() is called for registers, which weren't allocated as a part of a
  sequence, therefore catching a certain class of 8-bit and 16-bit code
  generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
  anything. It might be added to the tcg class, in case it's ever needed, but
  for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.

git-svn-id: trunk@37180 -
 2017-09-11 14:53:06 +00:00
nickysn
3c96090d3c + optimized avr code generation for shr by shiftcount=size*8-1 and sar by 
shiftcount>=size*8-1. This is commonly used by code, that extracts the sign
  bit and improves code generation for signed division by power-of-2 as well.
  This also fixes building avr-embedded (mantis #32241), which was caused by an
  infinite loop in the register allocator, when regvars are enabled, due to too
  much register pressure, when building charset.pp after r36842.

git-svn-id: trunk@36867 -
 2017-08-09 15:53:06 +00:00
nickysn
1476b5168d + added F_PL and F_MI to TResFlags for avr. This allows generating the BRPL and 
BRMI instructions via a_jmp_cond

git-svn-id: trunk@36866 -
 2017-08-09 15:14:33 +00:00
svenbarth
e76b1b2959 * use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler) 
git-svn-id: trunk@36809 -
 2017-07-28 15:54:03 +00:00
florian
a2e442e111 * keep the names of X, Y and Z in assembler files, fixes issue #32150 
git-svn-id: trunk@36776 -
 2017-07-23 19:24:45 +00:00
nickysn
5138d4e067 * fixed avr multiplication after r36344 
git-svn-id: trunk@36369 -
 2017-05-29 12:42:02 +00:00
svenbarth
7c9aeda656 * rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR 
git-svn-id: trunk@36310 -
 2017-05-23 19:58:39 +00:00
svenbarth
fab6f70de8 * rework AVR's InsertInitFinalTable to make use of get_init_final_list instead of iterating the init/fini functions itself 
git-svn-id: trunk@36309 -
 2017-05-23 19:46:07 +00:00
Jonas Maebe
61af0fb72d * only take into account the location of the parameter at the callee side to 
determine whether it's in a register if it's a pure assembler routine
  * you can't "index" implicit pointers either using their fields

git-svn-id: trunk@36287 -
 2017-05-21 20:17:11 +00:00
florian
4a43d992f5 * unified usage of MatchOpType 
* fixed generic MatchOpType

git-svn-id: trunk@36145 -
 2017-05-07 16:18:33 +00:00
florian
39b7f1bffe * do not write assembler optimizer debug output in avr assembler files 
git-svn-id: trunk@36063 -
 2017-05-02 19:50:37 +00:00