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16184 Commits

Author SHA1 Message Date
masta
c644503daf Add MovLdr2Ldr peephole optimizer for ARM 
The existing LdrLdr2LdrMov optimizer will generate a lot of
sequences like this:

ldr regA, [...]
mov regB, regA
ldr regB, [regB, ...]

this now gets changed to

ldr regA, [...]
ldr regB, [regA, ...]

this saves an instruction and might open up more possibilities for the load scheduler.

git-svn-id: trunk@26603 -
 2014-01-28 13:20:35 +00:00
masta
77d12f61a2 Handle LDRD and STRD correctly in RegInInstruction for ARM 
LDRD and STRD only have the first even numbered register in their instruction operands,
this additional code will also check for the register following it.
Example:
  ldrd r0, [r13]

The old code will only detect r0 as in use, not the implicit r1.

git-svn-id: trunk@26602 -
 2014-01-28 13:20:26 +00:00
pierre
754790f641 Use new static library not supproted message 
git-svn-id: trunk@26598 -
 2014-01-27 22:29:07 +00:00
pierre
6feab20b01 regenerated after: Add different message for static libraary not supported 
git-svn-id: trunk@26597 -
 2014-01-27 22:28:29 +00:00
pierre
b4d0cf5593 * Add different message for static libraary not supported 
git-svn-id: trunk@26596 -
 2014-01-27 22:26:29 +00:00
sergei
ff3fe06af9 * Changed condition around declaration of 'cgpara' to be the same as around its usage. 
- Removed one of $ifdef's.

git-svn-id: trunk@26595 -
 2014-01-27 01:41:51 +00:00
nickysn
5832c323b1 - don't define FPC_HAS_INTERNAL_BSF and FPC_HAS_INTERNAL_BSR on i8086. BSF/BSR 
is 386+ only and the internal handling was not used anyway on i8086, due to
  some nested defines in systemh.inc missing on i8086.

git-svn-id: trunk@26592 -
 2014-01-26 20:02:15 +00:00
nickysn
5e0359d389 * 16/8-bit ALU fix for 64-bit pred/succ after r26580 
git-svn-id: trunk@26590 -
 2014-01-26 15:44:58 +00:00
florian
48ae2d215a + concatcopy variants using sse and avx, only activated if optimization for size is done because at least on an i7-4770 it has shown no benefit 
git-svn-id: trunk@26588 -
 2014-01-26 12:37:54 +00:00
florian
060aa2a7fe + SSE and AVX unit cpu flags 
git-svn-id: trunk@26587 -
 2014-01-26 12:37:52 +00:00
florian
2ec5a649d7 * set Ch_* for more operations 
* Ch_* flags for VMOVSD and VMOVSS are now set for the 2 operand variants

git-svn-id: trunk@26586 -
 2014-01-26 12:37:50 +00:00
nickysn
e83ef05b74 - disable cs_opt_nodecse from -O2 on i8086, because it breaks building packages 
since r26579

git-svn-id: trunk@26583 -
 2014-01-26 02:08:08 +00:00
florian
c44b5d1043 * take care of tempinitcode when creating def information for tempcreatenodes 
git-svn-id: trunk@26581 -
 2014-01-25 09:40:51 +00:00
florian
cb8100bccf * do not reuse registers in prec/succ 
git-svn-id: trunk@26580 -
 2014-01-25 09:40:48 +00:00
florian
1b355ce1e4 * apply cse to all non-regable variables if possible 
git-svn-id: trunk@26579 -
 2014-01-25 08:50:13 +00:00
nickysn
be85998313 * fixes in optimize_op_const: 
* Do the sign extension of the 'a' parameter internally in a local variable,
    so that it does not become visible outside the function.
  * Use a zero extended version of 'a' (instead of sign extension) for the
    parameter of ispowerof2().

git-svn-id: trunk@26571 -
 2014-01-23 14:05:11 +00:00
Károly Balogh
2791e8ad15 use optimized cg loading functions in 64bit compares instead of hardcoded move.ls (move.l #X,dn is 48bit long, clr.l/moveq.l is 16bit long) 
git-svn-id: trunk@26570 -
 2014-01-23 03:03:44 +00:00
Károly Balogh
667ec17cae tiny optimization for clearing address regs 
git-svn-id: trunk@26569 -
 2014-01-23 02:29:45 +00:00
Károly Balogh
047395df5f implemented add/sub ops in a_op_reg_ref, since these are used often. also fixed up reference handling in a_op_const_ref a bit 
git-svn-id: trunk@26568 -
 2014-01-23 02:07:24 +00:00
Károly Balogh
cd4bb364e5 reenabled and fixed up tcg68k.op_const_ref a bit 
git-svn-id: trunk@26567 -
 2014-01-22 23:15:01 +00:00
sergei
534ecbda9f * SPARC: r26561 caused a_op_const_reg_reg used for zero-extending 8-bit values to be optimized away. Fixed by replacing it with an explicit instruction. 
git-svn-id: trunk@26566 -
 2014-01-22 21:37:37 +00:00
masta
0736bf4ded Try to change typical constant AND-masking operations into shifts for ARM 
If the constant only contains a string of ones starting from lsb or msb
we can shift out the bits accordingly, opening up some possibilities for
the peephole optimizer to fold at least one shift into another
operation.

git-svn-id: trunk@26565 -
 2014-01-22 20:21:02 +00:00
nickysn
85dd9e5789 + added a size parameter to optimize_op_const and do a sign extension of the 'a' parameter up from the specified size, so that things like (i and $ffffffff) get optimized away the same way as (i and -1) 
git-svn-id: trunk@26561 -
 2014-01-22 15:00:34 +00:00
sergei
ab44638635 + SPARC: initial peephole optimizer. 
git-svn-id: trunk@26555 -
 2014-01-21 14:22:59 +00:00
pierre
42140bd11f Add forgotten new file, should fix bug report 25571 
git-svn-id: trunk@26554 -
 2014-01-21 14:17:29 +00:00
sergei
cda81e1d18 * SPARC: emit "x shl 1" as "x+x", it yields shorter code. 
git-svn-id: trunk@26553 -
 2014-01-21 13:50:35 +00:00
pierre
408dc2d2c1 Regenerated after: Add -h output for new assemblers 
git-svn-id: trunk@26552 -
 2014-01-21 09:01:21 +00:00
pierre
af83a74544 Add -h output for new assemblers 
git-svn-id: trunk@26551 -
 2014-01-21 09:00:53 +00:00
pierre
9fc9f4bdba Use new as_i8086_nasmobj as external assembler for msdos target 
git-svn-id: trunk@26549 -
 2014-01-21 00:27:42 +00:00
pierre
3327d508ee Enable nasm assembler for x86_64 cpu 
git-svn-id: trunk@26548 -
 2014-01-21 00:26:49 +00:00
pierre
045f161012 Separate out nasm assembler for i8086, i386 and x86_64 cpus, also separte based on target object format 
git-svn-id: trunk@26547 -
 2014-01-21 00:26:08 +00:00
pierre
dfd37aae43 Add several x86 assemblers: yasm, and target specialized nasm, including for x86_64 
git-svn-id: trunk@26546 -
 2014-01-21 00:23:51 +00:00
pierre
b158ad6a9c Handle asmextraopt in arm assembler 
git-svn-id: trunk@26545 -
 2014-01-21 00:21:34 +00:00
pierre
12a1a680cc Regenerated after: Add help output for new -ao option to set asmextraopt 
git-svn-id: trunk@26544 -
 2014-01-21 00:20:51 +00:00
pierre
e44dc53083 Add help output for new -ao option to set asmextraopt 
git-svn-id: trunk@26543 -
 2014-01-21 00:20:23 +00:00
pierre
5e6669890a Handle asmextraopt in powerpc, mips and sparc assemblers 
git-svn-id: trunk@26542 -
 2014-01-21 00:19:17 +00:00
pierre
3f33fdd445 Handle asmextraopt in powerpc assmeblers 
git-svn-id: trunk@26541 -
 2014-01-21 00:17:56 +00:00
pierre
441b9feffc pass new asm extra opt using -ao option 
git-svn-id: trunk@26540 -
 2014-01-21 00:16:53 +00:00
pierre
6d4a9aad66 pass new asm extra opt using -ao option 
git-svn-id: trunk@26539 -
 2014-01-21 00:16:26 +00:00
pierre
e9c0484b3c pass new asm extra opt using -ao option 
git-svn-id: trunk@26538 -
 2014-01-21 00:15:43 +00:00
pierre
4441bbb9dc Add new global asmextraopt variable 
git-svn-id: trunk@26537 -
 2014-01-21 00:14:49 +00:00
pierre
1cec09f979 Add -Caoldwin32gnu ABI option to cope with 'ret $4' issues in old GNU mingw32 C compiler (version below 4.7) 
git-svn-id: trunk@26536 -
 2014-01-20 22:47:46 +00:00
sergei
8b3217815b * When inlining currency (ordinal) multiplication, change resultdef to int64, in order to be consistent with behavior of generic handling. Fixes compilation faliure after r26500, Mantis #25565. 
git-svn-id: trunk@26534 -
 2014-01-20 17:16:11 +00:00
Károly Balogh
5e15e4b07d add basic constant handling to subscript nodes, avoid ie20060521 when building rgobj.pas with -O3/-O4 
git-svn-id: trunk@26532 -
 2014-01-20 12:00:48 +00:00
sergei
ca58cc1d64 + x86_64: generate position-independent case jump tables (twice smaller than absolute ones and do not require dynamic relocations in .dll/.so). 
git-svn-id: trunk@26519 -
 2014-01-19 15:41:05 +00:00
paul
eb508a18e9 compiler: remove RST writer 
git-svn-id: trunk@26518 -
 2014-01-19 04:40:41 +00:00
sergei
6b1f021fcf - Removed remaining optimizations that duplicate functionality of tcg.optimize_op_const. 
- Don't call make_simple_ref if operation will be optimized away or replaced with another one, which calls make_simple_ref itself.

git-svn-id: trunk@26515 -
 2014-01-19 01:19:01 +00:00
nickysn
c83032992d * more fixes to the 3-op IMUL spilling: 
o Return the correct operation type for all forms of IMUL in
    taicpu.spilling_get_operation_type
  o Properly support 3-op IMUL in trgx86.do_spill_replace

git-svn-id: trunk@26514 -
 2014-01-18 21:46:13 +00:00
florian
a752e3542d + more x86 cpu flags 
git-svn-id: trunk@26513 -
 2014-01-18 21:03:09 +00:00
sergei
e6a9f3b15b * Fixed spilling of 3-operand IMUL instruction (went unnoticed this far because such instructions were not emitted by compiler). 
git-svn-id: trunk@26510 -
 2014-01-18 19:21:48 +00:00
nickysn
1f7b14f38e * fixed the conversion of powerof2 mul/imuls to lea in tcgx86.a_op_const_reg_reg 
git-svn-id: trunk@26509 -
 2014-01-18 17:58:31 +00:00
nickysn
cc1faad3d2 + make use of the 3-operand form of IMUL on i386 and x86_64 
git-svn-id: trunk@26508 -
 2014-01-18 17:04:57 +00:00
nickysn
1de847c754 * fixed error in comment 
git-svn-id: trunk@26507 -
 2014-01-18 17:00:10 +00:00
florian
7028210817 + tzcnt assembler instruction 
git-svn-id: trunk@26506 -
 2014-01-18 12:11:50 +00:00
sergei
3a3197ae9c + i386: inline 64-bit multiplications if overflow checking is disabled and not optimizing for size. Rough testing on Core 2 Duo shows speed improvement by factor of 5, even despite inlined code does not check for zero upper dwords. 
git-svn-id: trunk@26504 -
 2014-01-18 11:41:55 +00:00
florian
2a2184bc40 * regenerated makefiles affected by the last change 
git-svn-id: trunk@26503 -
 2014-01-18 10:21:41 +00:00
florian
fd5fa95416 + OPTNEW Makefile parameter: when running a native cycle, this allows to pass a parameter only to the new generated compiler 
git-svn-id: trunk@26501 -
 2014-01-18 10:19:16 +00:00
sergei
a3efd9e1df + Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive). 
git-svn-id: trunk@26500 -
 2014-01-18 09:59:59 +00:00
nickysn
2459518bdd * use IMUL even for unsigned multiplication on x86_64, when overflow checking is 
off

git-svn-id: trunk@26499 -
 2014-01-18 03:36:15 +00:00
nickysn
5d75bf4f92 * always use IMUL instead of MUL on i386, when doing a 32->32 multiplication 
without overflow checking

git-svn-id: trunk@26498 -
 2014-01-18 02:56:51 +00:00
nickysn
2602f379d7 * fixes in the 16 to 32-bit multiplication in ti8086addnode.second_mul 
git-svn-id: trunk@26497 -
 2014-01-18 00:38:46 +00:00
nickysn
3f4111ac37 * emit MUL instead of IMUL in ti8086addnode.second_mul when overflow checking is 
off and the multiplication is 16->16

git-svn-id: trunk@26495 -
 2014-01-17 23:04:46 +00:00
nickysn
529008e031 * emit MUL (when overflow checking is off), instead of IMUL for OP_IMUL in 
tcg8086.a_op_const_reg, when the target CPU is 8086/8088, because it's
  supposed to be faster on these processors, according to Intel's instruction
  timings.

git-svn-id: trunk@26493 -
 2014-01-17 21:23:42 +00:00
sergei
6168f563c2 * x86 compares: compare references with constants directly (without loading to register) if possible, this helps to reduce register pressure. 
git-svn-id: trunk@26492 -
 2014-01-17 19:42:09 +00:00
nickysn
820b667e1b - rm the OP_IMUL to SHL optimization from tcgx86.a_op_const_reg and tcgx86.a_op_const_ref, because it's already done in optimize_op_const, which is called in the beginning of both methods. 
git-svn-id: trunk@26491 -
 2014-01-17 18:34:13 +00:00
nickysn
767a0f1187 - rm TODO comment about the IMUL optimization with SHL from 
tcg8086.a_op_const_reg, since that optimization is already done in
  optimize_op_const, which is called earlier in the same method.

git-svn-id: trunk@26488 -
 2014-01-17 10:28:30 +00:00
nickysn
1a846e7c71 - rm TODO comment for overflow checking from tcg8086.a_op_const_reg, since 
overflow checking should not be implemented there. It should only leave the
  flags in place for the jo instruction, which the IMUL instruction already
  does.

git-svn-id: trunk@26487 -
 2014-01-17 10:26:20 +00:00
florian
e210d5f30e + cpu_capabilites for x86_64 and i386 
* take advantage of bmi2 instruction rorx

git-svn-id: trunk@26482 -
 2014-01-16 21:47:28 +00:00
sergei
75894722d4 * Factored a reusable piece of code into separate method. 
git-svn-id: trunk@26481 -
 2014-01-16 16:43:06 +00:00
paul
e7636cd6e6 compiler: fix a bug in .rsj output and enable it by default 
git-svn-id: trunk@26478 -
 2014-01-16 13:57:08 +00:00
paul
3aec5da7a7 compiler: use widestrings for json resource file generation 
git-svn-id: trunk@26477 -
 2014-01-16 12:07:26 +00:00
paul
3bd53b9658 compiler: add a method for generating json files for resource strings (for experiments only now) 
git-svn-id: trunk@26475 -
 2014-01-16 09:26:53 +00:00
Jonas Maebe
8065fc24d9 * fixed indentation of stack slot allocation debug statements 
git-svn-id: trunk@26474 -
 2014-01-15 20:36:59 +00:00
Jonas Maebe
2518c526c7 * always use a new register for array indices modified by a constant, 
improves register/stack allocation

git-svn-id: trunk@26473 -
 2014-01-15 20:36:56 +00:00
Jonas Maebe
a5653916e0 * convert array indices always to s32int, because that is the index type used 
by java arrays (otherwise we may get unwanted sign extensions after
    performing e.g. an s16bit operation, see the test)

git-svn-id: trunk@26472 -
 2014-01-15 20:36:52 +00:00
Jonas Maebe
67413a2823 * fixed skpara setter of tprocdef after r26332 
git-svn-id: trunk@26471 -
 2014-01-15 20:36:49 +00:00
sergei
c673c32ad9 + SPARC: generate position-independent case jump tables, as specified by ABI. 
Generate them also for non-PIC mode: absolute code is just 2 instructions shorter, trying to save them is probably not worth the effort.

git-svn-id: trunk@26468 -
 2014-01-15 15:31:53 +00:00
Károly Balogh
b398430b4c * get_volatile_registers* now defines proper volatile register range for all cases using the pre-defined values 
* removed the two huge and ugly case switches while parsing Amiga-specific paralocs, using a simple unified function now

git-svn-id: trunk@26466 -
 2014-01-15 02:49:03 +00:00
Károly Balogh
587acf6452 fix infinite spilling on m68k, patch by Florian, additional IE workaround by me, based on a similar hack in the ARM cg... 
git-svn-id: trunk@26465 -
 2014-01-15 02:09:02 +00:00
Károly Balogh
70f9b098e0 no longer define a segment field for m68k 
git-svn-id: trunk@26464 -
 2014-01-15 02:06:10 +00:00
Károly Balogh
80b253c111 be consistent in naming. renamed VOLATILE_ADDRESSREGISTER to VOLATILE_ADDRESSREGISTERS 
git-svn-id: trunk@26463 -
 2014-01-15 01:31:41 +00:00
Károly Balogh
b37ebeaabd disabled a_loadaddr_ref_cgpara() for m68k, this code was copy-pasted from x86 probably and could never work properly as it is 
git-svn-id: trunk@26462 -
 2014-01-15 01:27:02 +00:00
pierre
2a6e592fba Handle link map for msdos wlink 
git-svn-id: trunk@26461 -
 2014-01-14 21:40:02 +00:00
Jonas Maebe
ca446b4b2a - removed registration of x86_6432 target because it's not supported in any 
way by the compiler (and furthermore it would have to be registerd in an
    the x86_64 compiler binary, not an i386 one) (mantis #25525)

git-svn-id: trunk@26460 -
 2014-01-14 20:37:18 +00:00
Jonas Maebe
5fc4af09dd * don't crash when searching for a type helper in an anonymous array (or 
other non-record/objectdef-based) type (mantis #25504)

git-svn-id: trunk@26459 -
 2014-01-14 19:52:20 +00:00
Jeppe Johansen
123742647c Fixed problem in estimation of stack size for thumb targets. Types passed by value were not handled properly. 
git-svn-id: trunk@26458 -
 2014-01-14 19:27:15 +00:00
masta
fb52392e20 Reformat and comment is_thumb32_imm 
I've just regrouped the conditions a bit for easier understanding. No
functional changes.

git-svn-id: trunk@26449 -
 2014-01-13 21:32:28 +00:00
masta
3ab665e554 Try to split constant XORs into two shiftimms on ARM. 
git-svn-id: trunk@26448 -
 2014-01-13 21:32:24 +00:00
nickysn
aec73bce68 * pass the overflow check flag correctly to the 32 and 16-bit mul helpers (on 
i8086 and AVR) according to whether overflow checking is enabled (instead of
  always passing 'false')

git-svn-id: trunk@26445 -
 2014-01-13 00:45:12 +00:00
pierre
291124489f Use scripted version of wlib for go32v2 msdos smart library creation 
git-svn-id: trunk@26444 -
 2014-01-12 23:21:16 +00:00
pierre
e87e2f9c30 Print out command line before running it with -vx option 
git-svn-id: trunk@26443 -
 2014-01-12 23:06:19 +00:00
pierre
bef22b2a6f Add scripted version of wlib call for msdos 
git-svn-id: trunk@26442 -
 2014-01-12 22:47:27 +00:00
florian
fe7238bdf1 * avoid compiler warning about uninitialized variable 
git-svn-id: trunk@26441 -
 2014-01-12 21:21:56 +00:00
florian
98e5dead27 * moved comments in from of fields for better readability 
git-svn-id: trunk@26439 -
 2014-01-12 20:17:56 +00:00
florian
6e63272ab7 * added missing parenthesis 
git-svn-id: trunk@26438 -
 2014-01-12 20:17:54 +00:00
florian
15df4a4f80 + support iso pascal like program parameters in iso mode 
git-svn-id: trunk@26437 -
 2014-01-12 20:17:51 +00:00
florian
e841027a48 * fixes handling of typed files in iso mode 
git-svn-id: trunk@26436 -
 2014-01-12 20:17:48 +00:00
florian
e6a9e385d3 * spelling fixed 
git-svn-id: trunk@26435 -
 2014-01-12 20:17:44 +00:00
sergei
720b9bf560 * SPARC: reworked 64-bit comparisons so their result is always in flags. Comparisons are emitted as subtractions, sides are optionally swapped to avoid using Z flag (since it is not set correctly in multi-word subtraction). This generates significantly shorter code: when both sides are in registers it is just 3 instructions for equal/unequal and 2 instructions otherwise. 
git-svn-id: trunk@26433 -
 2014-01-12 15:11:47 +00:00
florian
cb48c2afca * some fixes for parameter handling on avr 
git-svn-id: trunk@26425 -
 2014-01-11 17:02:34 +00:00