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16184 Commits

Author SHA1 Message Date
nickysn
1f7b14f38e * fixed the conversion of powerof2 mul/imuls to lea in tcgx86.a_op_const_reg_reg 
git-svn-id: trunk@26509 -
 2014-01-18 17:58:31 +00:00
nickysn
cc1faad3d2 + make use of the 3-operand form of IMUL on i386 and x86_64 
git-svn-id: trunk@26508 -
 2014-01-18 17:04:57 +00:00
nickysn
1de847c754 * fixed error in comment 
git-svn-id: trunk@26507 -
 2014-01-18 17:00:10 +00:00
florian
7028210817 + tzcnt assembler instruction 
git-svn-id: trunk@26506 -
 2014-01-18 12:11:50 +00:00
sergei
3a3197ae9c + i386: inline 64-bit multiplications if overflow checking is disabled and not optimizing for size. Rough testing on Core 2 Duo shows speed improvement by factor of 5, even despite inlined code does not check for zero upper dwords. 
git-svn-id: trunk@26504 -
 2014-01-18 11:41:55 +00:00
florian
2a2184bc40 * regenerated makefiles affected by the last change 
git-svn-id: trunk@26503 -
 2014-01-18 10:21:41 +00:00
florian
fd5fa95416 + OPTNEW Makefile parameter: when running a native cycle, this allows to pass a parameter only to the new generated compiler 
git-svn-id: trunk@26501 -
 2014-01-18 10:19:16 +00:00
sergei
a3efd9e1df + Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive). 
git-svn-id: trunk@26500 -
 2014-01-18 09:59:59 +00:00
nickysn
2459518bdd * use IMUL even for unsigned multiplication on x86_64, when overflow checking is 
off

git-svn-id: trunk@26499 -
 2014-01-18 03:36:15 +00:00
nickysn
5d75bf4f92 * always use IMUL instead of MUL on i386, when doing a 32->32 multiplication 
without overflow checking

git-svn-id: trunk@26498 -
 2014-01-18 02:56:51 +00:00
nickysn
2602f379d7 * fixes in the 16 to 32-bit multiplication in ti8086addnode.second_mul 
git-svn-id: trunk@26497 -
 2014-01-18 00:38:46 +00:00
nickysn
3f4111ac37 * emit MUL instead of IMUL in ti8086addnode.second_mul when overflow checking is 
off and the multiplication is 16->16

git-svn-id: trunk@26495 -
 2014-01-17 23:04:46 +00:00
nickysn
529008e031 * emit MUL (when overflow checking is off), instead of IMUL for OP_IMUL in 
tcg8086.a_op_const_reg, when the target CPU is 8086/8088, because it's
  supposed to be faster on these processors, according to Intel's instruction
  timings.

git-svn-id: trunk@26493 -
 2014-01-17 21:23:42 +00:00
sergei
6168f563c2 * x86 compares: compare references with constants directly (without loading to register) if possible, this helps to reduce register pressure. 
git-svn-id: trunk@26492 -
 2014-01-17 19:42:09 +00:00
nickysn
820b667e1b - rm the OP_IMUL to SHL optimization from tcgx86.a_op_const_reg and tcgx86.a_op_const_ref, because it's already done in optimize_op_const, which is called in the beginning of both methods. 
git-svn-id: trunk@26491 -
 2014-01-17 18:34:13 +00:00
nickysn
767a0f1187 - rm TODO comment about the IMUL optimization with SHL from 
tcg8086.a_op_const_reg, since that optimization is already done in
  optimize_op_const, which is called earlier in the same method.

git-svn-id: trunk@26488 -
 2014-01-17 10:28:30 +00:00
nickysn
1a846e7c71 - rm TODO comment for overflow checking from tcg8086.a_op_const_reg, since 
overflow checking should not be implemented there. It should only leave the
  flags in place for the jo instruction, which the IMUL instruction already
  does.

git-svn-id: trunk@26487 -
 2014-01-17 10:26:20 +00:00
florian
e210d5f30e + cpu_capabilites for x86_64 and i386 
* take advantage of bmi2 instruction rorx

git-svn-id: trunk@26482 -
 2014-01-16 21:47:28 +00:00
sergei
75894722d4 * Factored a reusable piece of code into separate method. 
git-svn-id: trunk@26481 -
 2014-01-16 16:43:06 +00:00
paul
e7636cd6e6 compiler: fix a bug in .rsj output and enable it by default 
git-svn-id: trunk@26478 -
 2014-01-16 13:57:08 +00:00
paul
3aec5da7a7 compiler: use widestrings for json resource file generation 
git-svn-id: trunk@26477 -
 2014-01-16 12:07:26 +00:00
paul
3bd53b9658 compiler: add a method for generating json files for resource strings (for experiments only now) 
git-svn-id: trunk@26475 -
 2014-01-16 09:26:53 +00:00
Jonas Maebe
8065fc24d9 * fixed indentation of stack slot allocation debug statements 
git-svn-id: trunk@26474 -
 2014-01-15 20:36:59 +00:00
Jonas Maebe
2518c526c7 * always use a new register for array indices modified by a constant, 
improves register/stack allocation

git-svn-id: trunk@26473 -
 2014-01-15 20:36:56 +00:00
Jonas Maebe
a5653916e0 * convert array indices always to s32int, because that is the index type used 
by java arrays (otherwise we may get unwanted sign extensions after
    performing e.g. an s16bit operation, see the test)

git-svn-id: trunk@26472 -
 2014-01-15 20:36:52 +00:00
Jonas Maebe
67413a2823 * fixed skpara setter of tprocdef after r26332 
git-svn-id: trunk@26471 -
 2014-01-15 20:36:49 +00:00
sergei
c673c32ad9 + SPARC: generate position-independent case jump tables, as specified by ABI. 
Generate them also for non-PIC mode: absolute code is just 2 instructions shorter, trying to save them is probably not worth the effort.

git-svn-id: trunk@26468 -
 2014-01-15 15:31:53 +00:00
Károly Balogh
b398430b4c * get_volatile_registers* now defines proper volatile register range for all cases using the pre-defined values 
* removed the two huge and ugly case switches while parsing Amiga-specific paralocs, using a simple unified function now

git-svn-id: trunk@26466 -
 2014-01-15 02:49:03 +00:00
Károly Balogh
587acf6452 fix infinite spilling on m68k, patch by Florian, additional IE workaround by me, based on a similar hack in the ARM cg... 
git-svn-id: trunk@26465 -
 2014-01-15 02:09:02 +00:00
Károly Balogh
70f9b098e0 no longer define a segment field for m68k 
git-svn-id: trunk@26464 -
 2014-01-15 02:06:10 +00:00
Károly Balogh
80b253c111 be consistent in naming. renamed VOLATILE_ADDRESSREGISTER to VOLATILE_ADDRESSREGISTERS 
git-svn-id: trunk@26463 -
 2014-01-15 01:31:41 +00:00
Károly Balogh
b37ebeaabd disabled a_loadaddr_ref_cgpara() for m68k, this code was copy-pasted from x86 probably and could never work properly as it is 
git-svn-id: trunk@26462 -
 2014-01-15 01:27:02 +00:00
pierre
2a6e592fba Handle link map for msdos wlink 
git-svn-id: trunk@26461 -
 2014-01-14 21:40:02 +00:00
Jonas Maebe
ca446b4b2a - removed registration of x86_6432 target because it's not supported in any 
way by the compiler (and furthermore it would have to be registerd in an
    the x86_64 compiler binary, not an i386 one) (mantis #25525)

git-svn-id: trunk@26460 -
 2014-01-14 20:37:18 +00:00
Jonas Maebe
5fc4af09dd * don't crash when searching for a type helper in an anonymous array (or 
other non-record/objectdef-based) type (mantis #25504)

git-svn-id: trunk@26459 -
 2014-01-14 19:52:20 +00:00
Jeppe Johansen
123742647c Fixed problem in estimation of stack size for thumb targets. Types passed by value were not handled properly. 
git-svn-id: trunk@26458 -
 2014-01-14 19:27:15 +00:00
masta
fb52392e20 Reformat and comment is_thumb32_imm 
I've just regrouped the conditions a bit for easier understanding. No
functional changes.

git-svn-id: trunk@26449 -
 2014-01-13 21:32:28 +00:00
masta
3ab665e554 Try to split constant XORs into two shiftimms on ARM. 
git-svn-id: trunk@26448 -
 2014-01-13 21:32:24 +00:00
nickysn
aec73bce68 * pass the overflow check flag correctly to the 32 and 16-bit mul helpers (on 
i8086 and AVR) according to whether overflow checking is enabled (instead of
  always passing 'false')

git-svn-id: trunk@26445 -
 2014-01-13 00:45:12 +00:00
pierre
291124489f Use scripted version of wlib for go32v2 msdos smart library creation 
git-svn-id: trunk@26444 -
 2014-01-12 23:21:16 +00:00
pierre
e87e2f9c30 Print out command line before running it with -vx option 
git-svn-id: trunk@26443 -
 2014-01-12 23:06:19 +00:00
pierre
bef22b2a6f Add scripted version of wlib call for msdos 
git-svn-id: trunk@26442 -
 2014-01-12 22:47:27 +00:00
florian
fe7238bdf1 * avoid compiler warning about uninitialized variable 
git-svn-id: trunk@26441 -
 2014-01-12 21:21:56 +00:00
florian
98e5dead27 * moved comments in from of fields for better readability 
git-svn-id: trunk@26439 -
 2014-01-12 20:17:56 +00:00
florian
6e63272ab7 * added missing parenthesis 
git-svn-id: trunk@26438 -
 2014-01-12 20:17:54 +00:00
florian
15df4a4f80 + support iso pascal like program parameters in iso mode 
git-svn-id: trunk@26437 -
 2014-01-12 20:17:51 +00:00
florian
e841027a48 * fixes handling of typed files in iso mode 
git-svn-id: trunk@26436 -
 2014-01-12 20:17:48 +00:00
florian
e6a9e385d3 * spelling fixed 
git-svn-id: trunk@26435 -
 2014-01-12 20:17:44 +00:00
sergei
720b9bf560 * SPARC: reworked 64-bit comparisons so their result is always in flags. Comparisons are emitted as subtractions, sides are optionally swapped to avoid using Z flag (since it is not set correctly in multi-word subtraction). This generates significantly shorter code: when both sides are in registers it is just 3 instructions for equal/unequal and 2 instructions otherwise. 
git-svn-id: trunk@26433 -
 2014-01-12 15:11:47 +00:00
florian
cb48c2afca * some fixes for parameter handling on avr 
git-svn-id: trunk@26425 -
 2014-01-11 17:02:34 +00:00
paul
19d71655eb utils: fix few errors with sharepath in samplecfg 
git-svn-id: trunk@26424 -
 2014-01-11 16:15:02 +00:00
paul
4df2637e99 fpc: pass sharepath to fpc.cfg maker using samplecfg 
git-svn-id: trunk@26423 -
 2014-01-11 14:41:45 +00:00
pierre
7a03a7485f Fix typing error in cross-cycle at level 2 
git-svn-id: trunk@26417 -
 2014-01-10 17:43:30 +00:00
pierre
12d56bad5c Use os name only to look for units/$target/rtl if target has tf_use_8_3 to find installed directories 
git-svn-id: trunk@26416 -
 2014-01-10 15:11:44 +00:00
nickysn
372e9dfdf1 * improved the readability of the code of taddnode.try_make_mul32to64() even 
more by factoring out some of the node tests to nested functions

git-svn-id: trunk@26414 -
 2014-01-10 00:22:15 +00:00
nickysn
ac177a445e * use is_64bit() in taddnode.try_make_mul32to64() for better readability 
git-svn-id: trunk@26413 -
 2014-01-09 18:04:07 +00:00
Jonas Maebe
ffd6a4ea47 * set the code page of rawbytestring typed constants to the same value as 
when assigning a string constant to a rawbytestring (system code page with
    {$modeswitch systemcodepage}, CP_ACP without) (mantis #25332)

git-svn-id: trunk@26397 -
 2014-01-05 18:26:10 +00:00
paul
79ef05407a compiler: fix error message (was error message about resourcestring for property) 
git-svn-id: trunk@26389 -
 2014-01-05 07:12:41 +00:00
paul
f9c3c598b6 compiler: remove big codepage maps from the compiler executable - they will be loaded from -FM path when needed 
git-svn-id: trunk@26388 -
 2014-01-05 06:06:18 +00:00
nickysn
c2ba9ebfe5 + added different mul helpers for the 32 to 64-bit muls, since they can usually 
be implemented more efficiently than the 64 to 64-bit ones.

git-svn-id: trunk@26386 -
 2014-01-05 03:01:18 +00:00
paul
93883d1264 compiler: load binary unicode mappings in cpavailable() call instead of separate loadbinarycp() call 
git-svn-id: trunk@26379 -
 2014-01-04 16:42:20 +00:00
paul
52d1cbc544 compiler: 
+ add -FM command line option to pass directory for unicode binary files
  + enable dynamic loading of charset files (don't disable runtime charset files for the moment)

git-svn-id: trunk@26378 -
 2014-01-04 15:44:18 +00:00
nickysn
b8203a3406 * fixed tcg8086.gen_cmp32_jmp1 for the less than/greater than cases 
git-svn-id: trunk@26370 -
 2014-01-03 18:06:21 +00:00
nickysn
270444508a * fixed not(boolean32) and not(boolean64) on i8086 
git-svn-id: trunk@26369 -
 2014-01-03 15:18:07 +00:00
Jonas Maebe
ab4844bdff * give an internal error when trying to set/get procdef properties that are 
not available

git-svn-id: trunk@26367 -
 2014-01-03 12:23:27 +00:00
sergei
d2a9308181 + SPARC: implemented register spill replacement. 
git-svn-id: trunk@26364 -
 2014-01-03 08:14:43 +00:00
sergei
0afd95e840 * SPARC, tmoddivnode improvements/fixes: 
* don't bother reusing locations
  * don't optimize division into shift if overflow checking is enabled
  * if denominator is a constant and fits into 13 bit range, use it directly and save a register.

git-svn-id: trunk@26363 -
 2014-01-03 08:09:32 +00:00
nickysn
cf6f408214 + implemented the tcg8086.a_cmp_*_*_label methods for i8086. How did the i8086 
code generator even work without these?

git-svn-id: trunk@26362 -
 2014-01-03 03:31:51 +00:00
Jonas Maebe
32b9926536 * don't check forwarddefs of copied record/objectdefs (there are none, since 
such a def is just a renamed version of a def that's defined/implemented/
    checked elsewhere) -- fixes compiler crash when compiling webtbs/tw3930
    after r26332)

git-svn-id: trunk@26360 -
 2014-01-02 16:21:06 +00:00
florian
1fc6316cbc * use generic 32*32 -> 64 bit multiplication on arm thumb 
git-svn-id: trunk@26359 -
 2014-01-02 15:23:12 +00:00
masta
bcec29f1b4 Disable generation of UMULL when generating thumb1 code 
git-svn-id: trunk@26355 -
 2014-01-02 13:22:15 +00:00
masta
e5b3d89a5d Add CPUARM_HAS_UMULL flag 
Pre armv4 and all *M variants to not support UMULL and SMULL.

The Flag now gets used for 32x32->64 and 64x64->64 optimized code.

git-svn-id: trunk@26354 -
 2014-01-02 13:06:18 +00:00
sergei
36d0c8a5a7 * x86 and SPARC: fixed handling 64-bit (qwordbool) values in tcgnotnode (partial fix for Mantis #25255). 
* Moved handling LOC_JUMP locations to helper method of base class, it appears to be the same for all targets.

git-svn-id: trunk@26353 -
 2014-01-02 10:29:44 +00:00
nickysn
e1332304ef * when converting Hi() to a shr node, convert the right shr const parameter to 
sinttype, instead of u32inttype. This:
  1) is consistent with what type conversion tshlshrnode.pass_typecheck inserts
     on the right side
  2) avoids the expensive conversion to 32-bit and the even more expensive
     performing the operation in 32-bit on i8086

git-svn-id: trunk@26352 -
 2014-01-01 23:57:42 +00:00
nickysn
988b742d71 * avoid the meaningless conversion of the right shl/shr argument to 32-bit on 
i8086 in the cases when the left argument is 32-bit.

git-svn-id: trunk@26349 -
 2014-01-01 19:03:17 +00:00
masta
f8889e3d6d Use optimize_op_const in ARM cg 
This uses the generic optimizations done in optimize_op_const. Due to
this we can also drop some of the optimizations done in the arm-specific
code.

git-svn-id: trunk@26348 -
 2014-01-01 18:26:42 +00:00
masta
d32abdf047 Little cleanup in tarmaddnode.second_add64bit 
git-svn-id: trunk@26347 -
 2014-01-01 18:26:38 +00:00
masta
cec633e86e Optimized support for 32x32 => 64bit multiplications on ARM 
This code uses UMULL and SMULL to perform the multiplications, which
take two 32bit source registers and two 32bit destination registers.

git-svn-id: trunk@26346 -
 2014-01-01 18:26:29 +00:00
nickysn
dcb9306de8 * perform the OP_AND, OP_OR and OP_XOR optimizations for 0 and $FFFF values 
independently also in tcg8086.a_op_const_ref

git-svn-id: trunk@26345 -
 2014-01-01 17:45:40 +00:00
nickysn
9a1e33d2a0 * tcg8086.a_op_const_reg: perform the OP_AND, OP_OR and OP_XOR optimizations for 
$0000 and $FFFF values on the low and the high words independently.

git-svn-id: trunk@26344 -
 2014-01-01 14:57:44 +00:00
nickysn
9eb4419ba3 * fixed the conversion and assignment to the 64-bit boolean types on the i8086 
git-svn-id: trunk@26343 -
 2013-12-31 17:18:20 +00:00
nickysn
974fea30b2 * use only one temporary 16-bit register, instead of two in tcg8086.g_flags2ref 
when the target ref is 32-bit.

git-svn-id: trunk@26342 -
 2013-12-31 16:27:11 +00:00
nickysn
72e526b9b1 * taddnode.pass_1: set correctly expectloc to LOC_JUMP or LOC_FLAGS for compare 
nodes on 16/8-bit targets. This fixes (among other things) the conversion of
  booleans to boolean16 or boolean32 on i8086.

git-svn-id: trunk@26341 -
 2013-12-31 16:22:24 +00:00
nickysn
4917d8da39 - rm the special case handling of unsigned 32-bit ordinals in taddnode.pass_1, 
since it performs exactly the same thing as the generic signed 32-bit handling
  in the else clause (regardless of whether cpuneedsmulhelper is defined or not)

git-svn-id: trunk@26340 -
 2013-12-31 15:44:29 +00:00
florian
f393c3ff37 * propagate constants into the header of a for loop 
+ test which avoids this so we do not miss regressions on for loops with variable boundaries

git-svn-id: trunk@26339 -
 2013-12-31 13:16:09 +00:00
florian
b0441e1d64 * move setting of lnf_testatbegin into tfornode.simplify because it is a simplification 
git-svn-id: trunk@26338 -
 2013-12-31 13:16:06 +00:00
nickysn
bda163544a * tcg8086.g_flags2reg: restore the register back to the original size after the 
16-bit inc

git-svn-id: trunk@26337 -
 2013-12-31 13:15:30 +00:00
nickysn
fbd05c4e12 * Improved code generation in tcg8086.g_flags2reg for the case when target reg 
size is >=16-bit:
  o Generated code is now one instruction and one byte shorter.
  o No 8-bit subregisters are used, which reduces register pressure.

git-svn-id: trunk@26336 -
 2013-12-31 11:31:23 +00:00
nickysn
d57d982be7 * simpler handling of moves from a smaller to a larger cgsize in 
tcg8086.a_load_reg_ref, which additionally fixes the following issues:
  o The higher parts of the source register is no longer modified.
  o The source register's size is no longer modified with makeregsize.
  o Conversion from OS_S8 to a larger size is now supported.

git-svn-id: trunk@26335 -
 2013-12-31 00:33:37 +00:00
Jonas Maebe
a4c938c042 * changed some random data label names to match the label names outputted by 
current clang versions, works around some bugs (or at least backward
    incompatibilities) in the Xcode 5 linker when targeting ARM

git-svn-id: trunk@26334 -
 2013-12-31 00:28:46 +00:00
Jonas Maebe
5cbcfca33f * changed some Objective-C section declarations to match what's outputted by 
current clang versions

git-svn-id: trunk@26333 -
 2013-12-31 00:28:41 +00:00
Jonas Maebe
32b149c622 * moved a bunch of tprocdef fields that are only required when compiling the 
procdef to a dynamically allocated record that is not created when loading
    the procdef from ppu

git-svn-id: trunk@26332 -
 2013-12-31 00:28:28 +00:00
sergei
471d0a5164 + SPARC: support optimized 32x32 to 64 bit multiplications. 
git-svn-id: trunk@26331 -
 2013-12-30 23:40:47 +00:00
sergei
4168388235 + SPARC: support 8 and 16-bit arithmetic shifts. 
git-svn-id: trunk@26330 -
 2013-12-30 23:37:21 +00:00
nickysn
5d0814016d * improvements and fixes in tcg8086.a_load_reg_reg and .a_load_ref_reg: 
o When expanding from a OS_8 to a 16-bit or 32-bit tcgsize, use the R_SUBH
    subregister to initialize the high 16 bits of the register to zero. This
    generates shorter and faster code, without increasing register
    interferences, because R_SUBH has the same register constraints on i8086 as
    R_SUBL, which is already used on the same imaginary register.
  o After performing operations on the 8-bit subparts of a register that was
    initially 16-bit, call makeregsize(OS_16) to notify the register allocator
    that the register is once again 16-bit.

git-svn-id: trunk@26328 -
 2013-12-30 21:20:10 +00:00
sergei
63c1a05718 * SPARC: Removed hacks with g1_used that were used for g_intf_wrapper to be operational without initialized reg.allocator, and replaced them with a proper solution (which is basically a clone from MIPS cg). 
git-svn-id: trunk@26321 -
 2013-12-30 13:08:51 +00:00
sergei
05489d6e05 * SPARC: fixed g_intf_wrapper for non-virtual methods once again, my initial assumption was not correct: a wrapper does not necessarily reference methods from the class that implements the interface, it may be methods from parent classes, which can be located arbitrarily far away in address space. 
Now using code from g_external_wrapper, which has no distance limit and is only one instruction longer.

git-svn-id: trunk@26319 -
 2013-12-30 11:51:57 +00:00
sergei
bf94257310 * SPARC: simplified and fixed a_load_const_reg method, was generating redundant instructions for constants with non-zero bits 10..12. 
git-svn-id: trunk@26318 -
 2013-12-30 09:59:41 +00:00
Jonas Maebe
d2b8275b99 + support for arbitrary encodings in readstr/writestr 
o set the code page of the temporary "text" file to utf-8 for writestr with
     unicodestring/widestring as destination, so that no data loss can occur
     (+ properly deal with cases whereby part of an utf-8 character is
      written to the textbuf in this case)
   o explicitly pass the code page of the destination ansistring for writestr
     with ansistring as destination and set it for the temporary "text" file
   o set the code page of the text file for readstr

git-svn-id: trunk@26317 -
 2013-12-29 19:18:49 +00:00
nickysn
f69a76b5b1 * generate shorter code on 8-bit and 16-bit CPUs in thlcg2ll.location_force_reg, 
when converting a LOC_JUMP location to a (OS_INT<x<=32)-bit reg location
  (the optimization is similar to r26314, but is for non 64-bit destinations).

git-svn-id: trunk@26315 -
 2013-12-29 19:07:35 +00:00
nickysn
9ec84d1259 * generate shorter code on 8 and 16-bit CPUs in thlcg2ll.location_force_reg, 
when converting a LOC_JUMP location to a 64-bit reg location by only setting
  the low OS_INT-sized register to 0 or 1 in the false/true label parts and then
  initializing the remaining registers (obtainable via GetNextReg()) to 0 in the
  common part after the jumps.

git-svn-id: trunk@26314 -
 2013-12-29 17:28:35 +00:00
nickysn
6d48b32115 * fixes and improvements in tcg8086.a_load_reg_reg for the case when the src and 
dest are subregisters of the same superregister, but of different sizes:
   o Do not emit spurious moves from a register to the same register.
   o Correctly support the case when converting from 16-bit to 32-bit int.
     Previously it didn't work correctly, because in this particular case, due
     to the way the GetNextReg scheme works, we have reg1=reg2.

git-svn-id: trunk@26313 -
 2013-12-29 17:15:58 +00:00
nickysn
4e795eca99 * fixes for 16 and 8-bit ALUs in thlcg2ll.location_force_reg for the cases when 
converting from a LOC_FLAGS or LOC_JUMP location to a 64-bit reg location.
  This fixes test/cg/tcnvint1.pp on i8086 after r26301.

git-svn-id: trunk@26312 -
 2013-12-29 14:30:41 +00:00
florian
27f6fd1c2c * use new shl/shr constant folding (of r26295) only if forinline is set 
* explicitly simplify tree after constant propagation

git-svn-id: trunk@26311 -
 2013-12-29 14:09:03 +00:00
sergei
34cde7a07a * SPARC, tsparcaddnode.second_cmp64bit: don't copy LOC_CREGISTER locations, and handle comparison with constants without loading them into register (if possible). 
git-svn-id: trunk@26309 -
 2013-12-29 10:12:19 +00:00
sergei
f8a60522d4 - SPARC: removed 3 code generator methods, they provide no difference in generated code from generic code generator. 
git-svn-id: trunk@26307 -
 2013-12-29 10:00:09 +00:00
florian
880201e56c + pointerconstn is also a constant node 
git-svn-id: trunk@26305 -
 2013-12-28 20:20:00 +00:00
florian
de3a116a28 * handle records with size 0 as function results correctly 
git-svn-id: trunk@26303 -
 2013-12-28 20:19:56 +00:00
florian
561ec1f782 * unified internal errors 
git-svn-id: trunk@26302 -
 2013-12-28 20:19:54 +00:00
florian
2081b9cad7 * do not convert a boolean to a 32 bit int first when converting to a 64 bit int, this causes data loss when casting e.g. a qwordbool to a qword 
git-svn-id: trunk@26301 -
 2013-12-28 20:19:51 +00:00
florian
27ac68cdc7 * be more careful when removing dead stores 
* take care also of staticvarsyms when removing dead stores

git-svn-id: trunk@26298 -
 2013-12-28 20:19:42 +00:00
florian
e9777503d1 * check addr_taken when propagating constants 
* do constant propagation on static var syms as well

git-svn-id: trunk@26297 -
 2013-12-28 20:19:40 +00:00
florian
b1ee6f282c * set successor node for load nodes as well, they can be generated when inlining 
git-svn-id: trunk@26296 -
 2013-12-28 20:19:38 +00:00
florian
89663e499b * fold shifting of constants equally to cpus 
* test adapted, e.g. 1 shl 63 needs now an explicit cast to qword for the one: qword(1) shl 63

git-svn-id: trunk@26295 -
 2013-12-28 20:19:35 +00:00
sergei
d70a880f33 * SPARC: properly justify parameters on stack with size less than 4, fixes failure on tests/cg/tcalext5.pp 
git-svn-id: trunk@26294 -
 2013-12-28 09:23:10 +00:00
sergei
176d8434e4 * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. 
+ Enable registers %i0..%i5 and %o7 for use by reg.allocator.

Some notable properties of this implementation are:
  o pi_needs_got flag can be safely set during pass 2, so not setting it occasionally in pass 1 does not result in internal error.
  o Reg.allocator configuration is independent from PIC. If procedure requires GOT, register %l7 is allocated at the prologue, making it unavailable to RA.
  o GOT is stored in fixed %l7 register, but it is trivial to switch over to virtual register.

git-svn-id: trunk@26293 -
 2013-12-27 19:53:38 +00:00
sergei
1a3b46967e + Two more checks for access to global data and setting the pi_needs_got flag, intended for targets that require decision about PIC code generation strictly before pass 2. 
git-svn-id: trunk@26292 -
 2013-12-27 13:41:36 +00:00
sergei
eaba90dda7 * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 
* Assembler reader: rewrote branch condition matching part, don't try to match integer suffixes to floating-point branches and vice versa.

git-svn-id: trunk@26290 -
 2013-12-27 06:45:49 +00:00
sergei
890d757573 + SPARC: override g_external_wrapper method and emit PIC-safe jump without distance limit. Mantis #25455. 
git-svn-id: trunk@26286 -
 2013-12-26 07:37:22 +00:00
nickysn
fdd36b4603 * on i8086 with regvars on, do not notify the register allocator of moves to BX. 
This fixes compilation of unit math (and the whole RTL) with regvars enabled.

git-svn-id: trunk@26282 -
 2013-12-25 12:19:21 +00:00
sergei
e6a9bfdc1d * SPARC, g_concatcopy and g_concatcopy_unaligned: removed strange (probably long outdated) comments and unnecessary operations. 
* g_concatcopy: avoid taking address of references if possible.

git-svn-id: trunk@26281 -
 2013-12-25 10:45:25 +00:00
sergei
03fb83cc01 * SPARC: fixed PIC interface wrappers for non-virtual methods. The fix uses branching with 8 MB distance limit, but in particular case of interface wrappers this limit applies to code size of a single unit, not to entire program, and is therefore hard enough to reach. 
git-svn-id: trunk@26279 -
 2013-12-25 08:13:10 +00:00
nickysn
420f30bacd * fixed the handling of OS_PAIR/OS_SPAIR-sized parameters in ncgutil.gen_load_cgpara_loc. This fixes 32-bit regvar'd parameters on i8086. 
git-svn-id: trunk@26278 -
 2013-12-24 23:07:44 +00:00
yury
eea69a2947 * ppudump: Fixed json and xml output of inline types in array declaration. 
git-svn-id: trunk@26277 -
 2013-12-24 12:32:55 +00:00
nickysn
af49e50a3c * do not cause an internal error when location_reg2string is called on a 
location where the registers have been translated (i.e. not imaginary), but
  GetNextReg is necessary to get some of the registers (only on 16/8-bit CPUs).
  The missing registers are indicated as '??'. This avoids a crash when
  compiling a system unit on i8086 with regvars enabled and withous -sr, while
  still giving the full list of registers when compiling with -sr.

git-svn-id: trunk@26276 -
 2013-12-24 00:01:28 +00:00
nickysn
338d72f564 * extracted the code from psub.translate_registers for generating the name of 
the registers from a tlocation to a new function called location_reg2string
+ added support for 16-bit and 8-bit ALUs in location_reg2string

git-svn-id: trunk@26275 -
 2013-12-23 22:58:32 +00:00
yury
996ee048be * ppudump: Properly handle type definitions inside a class definition for json and xml output. 
git-svn-id: trunk@26273 -
 2013-12-23 14:45:03 +00:00
nickysn
99770d367f * 16-bit and 8-bit ALU fixes in tcgtempdeletenode.pass_generate_code 
git-svn-id: trunk@26272 -
 2013-12-23 14:09:28 +00:00
nickysn
39c54bf077 * handle ait_varloc in the nasm writer. This allows compiling the system unit 
for i8086 with regvars and -sr for debugging purposes.

git-svn-id: trunk@26271 -
 2013-12-23 13:27:22 +00:00
yury
bc14407ffe * ppudump: Deref index -1 is valid for absolute symbols. Handle this. 
git-svn-id: trunk@26270 -
 2013-12-23 12:26:28 +00:00
sergei
65d24e000f * SPARC: generate PIC prologue as recommended by ABI, it does not require FPC_GETGOT helper. 
git-svn-id: trunk@26264 -
 2013-12-22 14:20:18 +00:00
sergei
6469d41e2a * SPARC: removed 32 bit shift code, and adjusted 64-bit shifts to take advantage of 3-address instructions (a port of r26142 for MIPS) 
git-svn-id: trunk@26263 -
 2013-12-22 14:09:24 +00:00
sergei
58cc531dd9 * SPARC: convert from int64/qword to float using genmath helpers. Removes dependency on softfloat code. 
git-svn-id: trunk@26262 -
 2013-12-22 14:02:34 +00:00
sergei
5ccdfcf106 * SPARC: optimized a_op_const_reg and a_op_const_reg_reg, take advantage of optimize_op_const functionality. 
git-svn-id: trunk@26261 -
 2013-12-22 13:54:49 +00:00
sergei
9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 
git-svn-id: trunk@26259 -
 2013-12-21 16:27:24 +00:00
sergei
8ecad469a6 * Reverted r26256 since it produced wrong results if argument of inc/dec is actually unaligned. Added description of the issue and slightly increased node complexity at which address is cached, so operations on record/class fields do not take address. 
git-svn-id: trunk@26258 -
 2013-12-21 10:33:38 +00:00
sergei
c3fe0c7379 * On SPARC, using shifts for zero-extending to OS_16 is more efficient than ANDing with 65535 (two instructions and no temp registers vs. three instructions and a temp register). 
git-svn-id: trunk@26257 -
 2013-12-20 19:00:44 +00:00
sergei
b376f56bf3 * Use typed pointer to store address of x when processing inc(x)/dec(x) with range checking enabled. This preserves alignment of x and prevents generating unaligned code on alignment-sensitive targets. 
git-svn-id: trunk@26256 -
 2013-12-20 17:13:41 +00:00
sergei
5cd0684d45 * tcg.a_load_ref_reg_unaligned: if loading signed 16-bit value, treat upper half as signed 8-bit to ensure that result is properly extended. This routine is used only by SPARC target (other CPUs use specific implementations), and it generates pretty inefficient code, therefore it's probably worth to drop it altogether and implement SPARC-specific version. Mantis #25440. 
git-svn-id: trunk@26255 -
 2013-12-20 17:07:00 +00:00
sergei
f2096de53a * tcg386.g_proc_exit: instead of recalculating stack size, use current_procinfo.final_localsize which was calculated in g_proc_entry. 
* tcgx86.g_proc_entry: don't over-allocate stack in SEH finalizer procedures.

git-svn-id: trunk@26251 -
 2013-12-19 10:32:32 +00:00
sergei
258e8c58a4 + Added trecorddef.buildderefimpl, necessary since advanced records have been implemented. Fixes compiler crash on webtbs/tw18688.pp on x86_64-win64. 
git-svn-id: trunk@26250 -
 2013-12-18 16:26:50 +00:00
nickysn
be5f49b3e5 * tx86addnode.second_cmpfloat: on i8086 only load the high byte of the FPU 
status word after fstsw (and before sahf), because 8-bit memory transfers are
  faster on the i8088, due to the 8-bit data bus

git-svn-id: trunk@26245 -
 2013-12-16 23:52:28 +00:00
nickysn
ada9ccf6a6 * tx86addnode.second_cmpfloat: do not emit a fwait after fstsw as my own testing 
on a true i8087 showed that the fwait isn't necessary

git-svn-id: trunk@26244 -
 2013-12-16 23:17:44 +00:00
sergei
6ea9ce1077 * Force managed types to be always returned in parameters, independent of target (primitive types were already handled that way; the patch affects small records with fields of managed types). 
* Generating code to finalize result on exception at callee side is no longer necessary.

git-svn-id: trunk@26228 -
 2013-12-13 19:54:46 +00:00
nickysn
a7b4953795 + proper (i.e. not broken) implementation of arctan() for the 8087 and 80287 
git-svn-id: trunk@26226 -
 2013-12-12 23:46:51 +00:00
sergei
179586f589 + SEH support for Win32. Enable by cycling with OPT=-dTEST_WIN32_SEH. 
Although basic things work (no regressions in test suite, also with TEST_OPT=-O2), there are some secondary issues/TODOs:
- Exception frame around PASCALMAIN is not properly removed in DLLs
- No stack traces yet
- Stack overallocated in finalizer procedures, their entry/exit code needs cleanup
- Signals unit is probably completely broken.

git-svn-id: trunk@26225 -
 2013-12-12 12:43:46 +00:00
sergei
1ee9373fa6 * Changed function create_pd into method of ttryfinallynode, so it can be reused for Win32 SEH and, in the future, for DWARF-based exception handling on other targets. 
* Additional two minor changes: reset po_delphi_nested_cc on result, so it is independent of current {$modeswitch nestedprocvar} state, and removed call to alloc_proc_symbol (which belongs to pass 2).

git-svn-id: trunk@26222 -
 2013-12-12 08:38:06 +00:00
sergei
ffba5aee60 * MIPS: emit PIC-friendly instruction sequences instead of "J" when fixing up branches outside of 128K range. Resolves #25399. 
git-svn-id: trunk@26215 -
 2013-12-11 10:56:07 +00:00
sergei
0e0273d53f * Partially reverted r26192, preserving registers in presence of exceptions needs a different solution. 
git-svn-id: trunk@26210 -
 2013-12-10 12:43:24 +00:00
Jeppe Johansen
d24cbbf9f5 Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4. 
Fixed a bug where ARMv7M targets would not use the DIV instructions.
Moved many size-optimizing Thumb2 peephole optimizations to PostPeepHoleOptsCpu. Previously those optimizations could make it impossible to reuse the shared arm peephole optimizations.
Reenabled a fixed MLA/MLS peephole optimization.
Refactored some FindRegDealloc+regLoadedWithNewValue into RegEndOfLife calls.
Fixed some broken UXTB/UXTH optimizations. Previously they would also match UXT* instructions with ROR shifter ops.

git-svn-id: trunk@26198 -
 2013-12-08 16:50:15 +00:00