nickysn
41b5829983
- removed commented out code, because it looks like a misleading comment
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git-svn-id: branches/z80@44982 -
2020-04-21 23:40:46 +00:00
nickysn
9fc1d39beb
+ implemented code generation for signed 16/32/64-bit comparisons (<,<=,>,>=)
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git-svn-id: branches/z80@44980 -
2020-04-21 23:00:32 +00:00
nickysn
ce8ed9efa8
+ added another helper tcgz80.a_jmp_signed_cmp_3way
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git-svn-id: branches/z80@44979 -
2020-04-21 22:48:44 +00:00
nickysn
ded10c55b3
- removed an extra unused jump
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git-svn-id: branches/z80@44978 -
2020-04-21 22:17:30 +00:00
nickysn
027217d1fe
* fixed an OP_SUB bug in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44977 -
2020-04-21 22:05:02 +00:00
nickysn
c1fa5600f1
+ implemented code generation for unsigned 16,32 and 64-bit comparisons (<,<=,>,>=)
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git-svn-id: branches/z80@44976 -
2020-04-21 21:52:55 +00:00
nickysn
a714a2fb76
+ added a jmp helper that handles all possible combinations of jump on below, equal and above (unsigned comparison)
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git-svn-id: branches/z80@44975 -
2020-04-21 21:38:15 +00:00
nickysn
08f02cfd87
+ implemented code generation for 16-bit, 32-bit and 64-bit equal and unequal comparisons. </<=/>/>=
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are still 8-bit only.
git-svn-id: branches/z80@44974 -
2020-04-21 20:37:05 +00:00
nickysn
0bbd140228
* fixed handling of untyped const parameters
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git-svn-id: branches/z80@44971 -
2020-04-21 19:19:17 +00:00
nickysn
7bfce62302
* fixed stack direction in assignintreg. This fixes problems with the parameter location calculation.
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git-svn-id: branches/z80@44964 -
2020-04-21 16:41:43 +00:00
nickysn
fcaf2fe5a0
* stack_offset changed to longint
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git-svn-id: branches/z80@44963 -
2020-04-21 16:34:21 +00:00
nickysn
0332a60cb8
* cur_stack_offset changed to longint
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git-svn-id: branches/z80@44962 -
2020-04-21 16:31:15 +00:00
nickysn
c67fa28d7c
* use a LD sequence for 2-byte moves as well in tcgz80.g_concatcopy
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git-svn-id: branches/z80@44961 -
2020-04-21 16:26:04 +00:00
nickysn
f8b0c24024
+ support pushing word-sized parameters in a_load_reg_cgpara
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git-svn-id: branches/z80@44911 -
2020-04-21 03:48:36 +00:00
nickysn
391990e456
* tg.direction is always -1 on the Z80
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git-svn-id: branches/z80@44908 -
2020-04-21 03:02:43 +00:00
nickysn
d3e946b779
* fixed Z80 stack and temp allocation, so it doesn't have any wasted bytes
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git-svn-id: branches/z80@44906 -
2020-04-21 02:51:44 +00:00
nickysn
168c009bc3
- removed the 'sdcc-' prefix of sdasz80 and sdldz80
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git-svn-id: branches/z80@44900 -
2020-04-20 23:50:45 +00:00
nickysn
2f68090dd6
* synchronized with trunk
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git-svn-id: branches/z80@44898 -
2020-04-20 22:42:08 +00:00
nickysn
557a481743
+ use normalize_ref in tcgz80.a_load_ref_reg
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git-svn-id: branches/z80@44897 -
2020-04-20 21:44:36 +00:00
nickysn
1813727faf
+ support addr_full in the sdcc-sdasz80 asm writer
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git-svn-id: branches/z80@44896 -
2020-04-20 21:38:31 +00:00
nickysn
bee3e9c354
+ make use of normalize_ref in tcgz80.a_load_reg_ref
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git-svn-id: branches/z80@44895 -
2020-04-20 21:34:10 +00:00
nickysn
a7b69cd18b
- removed make_simple_ref, because normalize_ref should be used instead
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git-svn-id: branches/z80@44894 -
2020-04-20 20:52:07 +00:00
nickysn
0d6e59e9ef
+ actually return the proper (HL) reference result in tcgz80.normalize_ref
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git-svn-id: branches/z80@44893 -
2020-04-20 20:49:45 +00:00
nickysn
5c138c341f
+ added an output parameter to tcgz80.normalize_ref, that returns a list of the registers that were
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actually used, so they can be freed after the reference is used.
git-svn-id: branches/z80@44892 -
2020-04-20 20:46:30 +00:00
nickysn
fc991af9d1
+ added tregisterlist - dynarray of tregister, and methods get/uncpuregisters for allocating/freeing
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a dynamic list of registers
git-svn-id: branches/z80@44891 -
2020-04-20 20:42:16 +00:00
nickysn
882522259e
+ initial implementation of tcgz80.normalize_ref
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git-svn-id: branches/z80@44890 -
2020-04-20 20:27:08 +00:00
nickysn
6e1dd417cf
+ only allow the first operand to be a condition
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git-svn-id: branches/z80@44886 -
2020-04-20 17:07:21 +00:00
nickysn
a6e72713ad
+ support conditions in the Z80 inline assembler
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git-svn-id: branches/z80@44885 -
2020-04-20 17:02:03 +00:00
nickysn
e5f4419694
+ also support local labels in the Z80 inline assembler reader
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git-svn-id: branches/z80@44884 -
2020-04-20 16:08:13 +00:00
nickysn
90fa75fb7a
+ support labels in the Z80 inline assembler
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git-svn-id: branches/z80@44883 -
2020-04-20 15:49:11 +00:00
nickysn
ed2c19293a
- removed getopstr - unused function, causing warning
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git-svn-id: branches/z80@44834 -
2020-04-19 04:54:38 +00:00
nickysn
fb9d7c1289
* fixed warning in agsdasz80
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git-svn-id: branches/z80@44833 -
2020-04-19 04:52:33 +00:00
nickysn
fc9a5797dd
* fixed warning in agz80asm
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git-svn-id: branches/z80@44832 -
2020-04-19 04:50:32 +00:00
nickysn
bb0c9424f8
* another warning in cgcpu fixed
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git-svn-id: branches/z80@44830 -
2020-04-19 04:46:09 +00:00
nickysn
8a5757e72b
* fixed warnings in Z80 cgcpu
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git-svn-id: branches/z80@44829 -
2020-04-19 04:44:26 +00:00
nickysn
44d4b5ea83
* fixed warnings in aoptcpu
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git-svn-id: branches/z80@44828 -
2020-04-19 04:40:48 +00:00
nickysn
85e3ad2193
* fixed warnings in Z80 rgcpu
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git-svn-id: branches/z80@44827 -
2020-04-19 04:38:47 +00:00
nickysn
36043e8046
* fix warning in Z80 cpupara
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git-svn-id: branches/z80@44826 -
2020-04-19 04:32:54 +00:00
nickysn
3deeff689a
+ added a ZX Spectrum target to the compiler
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git-svn-id: branches/z80@44815 -
2020-04-19 01:09:03 +00:00
nickysn
35742f4d0d
+ write a comment for the CPU directive in the sdcc-sdasz80 asm output
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git-svn-id: branches/z80@44812 -
2020-04-19 00:04:41 +00:00
nickysn
e86cd0df7a
+ handle ait_marker in the sdcc-sdasz80 asm writer
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git-svn-id: branches/z80@44811 -
2020-04-19 00:00:34 +00:00
nickysn
27e01155a5
- cleaned up lots of unused commented out code from the z80 asm reader
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git-svn-id: branches/z80@44808 -
2020-04-18 23:43:41 +00:00
nickysn
a512b0cc99
+ some reference handling fixes
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git-svn-id: branches/z80@44806 -
2020-04-18 23:32:39 +00:00
nickysn
47bfe41766
+ initial implementation of const and ref operands (refs not fully working yet)
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git-svn-id: branches/z80@44805 -
2020-04-18 23:25:02 +00:00
nickysn
ce598813fa
+ handle all registers properly in reg_cgsize
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git-svn-id: branches/z80@44804 -
2020-04-18 22:34:21 +00:00
nickysn
0dcccfb4bd
+ implemented support for operands in the z80 asm reader - support only registers for now
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git-svn-id: branches/z80@44803 -
2020-04-18 22:27:32 +00:00
nickysn
383e834324
+ handle 0 operand instructions in the z80 asm reader
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git-svn-id: branches/z80@44802 -
2020-04-18 22:12:43 +00:00
nickysn
407d19560c
+ handle and skip AS_SEPARATOR in the z80 assembler reader
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git-svn-id: branches/z80@44801 -
2020-04-18 21:58:21 +00:00
nickysn
dced623ab2
+ implemented tz80reader.gettoken
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git-svn-id: branches/z80@44800 -
2020-04-18 21:54:14 +00:00
nickysn
97f7095109
+ some more z80 asm reader stuff
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git-svn-id: branches/z80@44786 -
2020-04-18 15:27:47 +00:00
nickysn
4e5e42f839
+ added the AS_END directive
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git-svn-id: branches/z80@44784 -
2020-04-18 14:34:36 +00:00
nickysn
6e0bdaf128
+ implemented tz80reader.is_asmopcode
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git-svn-id: branches/z80@44783 -
2020-04-18 14:32:44 +00:00
nickysn
5a94c2adbe
+ added tz80reader comment for lazarus autocompletion
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git-svn-id: branches/z80@44782 -
2020-04-18 14:23:11 +00:00
nickysn
4e7e48ef32
* moved tz80reader comment
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git-svn-id: branches/z80@44781 -
2020-04-18 14:22:42 +00:00
nickysn
f78fef23a2
+ implemented tz80reader.is_register
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git-svn-id: branches/z80@44780 -
2020-04-18 14:20:17 +00:00
nickysn
8164d91050
+ defined some tokens for the z80 asm reader
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git-svn-id: branches/z80@44779 -
2020-04-18 14:17:06 +00:00
nickysn
4ba42b5b5f
+ build the z80 assembler reader units (not working yet)
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git-svn-id: branches/z80@44778 -
2020-04-18 13:46:42 +00:00
nickysn
05a6bcec13
+ support more instructions in taicpu.spilling_get_operation_type
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git-svn-id: branches/z80@44772 -
2020-04-18 02:02:38 +00:00
nickysn
f08dc825ef
* changed AVR to Z80 in comment
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git-svn-id: branches/z80@44771 -
2020-04-18 01:51:36 +00:00
nickysn
d0122e1bf3
+ added toperandtype subrange types for convenience
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git-svn-id: branches/z80@44770 -
2020-04-18 01:50:20 +00:00
nickysn
513ef512ff
- removed redundant opcode:=A_LD assignments in do_spill_replace
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git-svn-id: branches/z80@44769 -
2020-04-18 00:51:48 +00:00
nickysn
721bbe636b
+ support the bit,set and res instructions in do_spill_replace
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git-svn-id: branches/z80@44768 -
2020-04-18 00:50:43 +00:00
nickysn
81ccf6935c
+ support the rlc,rl,rrc,rr,sla,sra and srl instructions in do_spill_replace
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git-svn-id: branches/z80@44767 -
2020-04-18 00:42:47 +00:00
nickysn
82ca49e0a6
+ use is_ref_in_opertypes in nz80add
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git-svn-id: branches/z80@44766 -
2020-04-18 00:32:01 +00:00
nickysn
0245075c05
+ use is_ref_in_opertypes in cgcpu
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git-svn-id: branches/z80@44765 -
2020-04-18 00:30:09 +00:00
nickysn
c9ac7afba7
+ introduced is_ref_in_opertypes
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git-svn-id: branches/z80@44764 -
2020-04-18 00:27:31 +00:00
nickysn
54ad38288b
+ introduced is_ref_opertype
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git-svn-id: branches/z80@44763 -
2020-04-18 00:24:12 +00:00
nickysn
2edb5932a3
+ introduced is_ref_addr16
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git-svn-id: branches/z80@44762 -
2020-04-18 00:19:43 +00:00
nickysn
4d67bd509e
+ introduced is_ref_bc,is_ref_de,is_ref_sp
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git-svn-id: branches/z80@44761 -
2020-04-18 00:18:02 +00:00
nickysn
5547be6b3f
* make use of the new is_ref_XXX functions
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git-svn-id: branches/z80@44760 -
2020-04-18 00:11:34 +00:00
nickysn
5c0fa369c2
+ added z80 reference helper functions is_ref_hl,is_ref_ix,is_ref_iy,is_ref_ix_d,is_ref_iy_d
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git-svn-id: branches/z80@44759 -
2020-04-18 00:04:09 +00:00
nickysn
4b01ff605a
* changed max_operands to 2 for the Z80
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git-svn-id: branches/z80@44758 -
2020-04-17 23:34:56 +00:00
nickysn
66462fec68
- removed taddressmode from the Z80 code generator - it's a leftover from AVR that doesn't apply to the Z80
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git-svn-id: branches/z80@44756 -
2020-04-17 23:01:13 +00:00
nickysn
53de231c23
+ added the instruction opcode information strings to the compiler instruction table
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git-svn-id: branches/z80@44755 -
2020-04-17 22:57:18 +00:00
nickysn
be095914ec
+ created and included an Z80 instruction table
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git-svn-id: branches/z80@44753 -
2020-04-17 22:47:15 +00:00
nickysn
3ab0f3a93f
+ added a toperandtype enum, containing all the operand types of Z80
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git-svn-id: branches/z80@44752 -
2020-04-17 22:04:54 +00:00
nickysn
1f5a1f8c28
+ added DJNZ to the set of jmp instructions
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git-svn-id: branches/z80@44750 -
2020-04-17 19:30:44 +00:00
nickysn
f307f6954f
* formatting
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git-svn-id: branches/z80@44744 -
2020-04-17 02:32:14 +00:00
nickysn
962e339ec4
+ TZ80AddNode.NoEqual
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git-svn-id: branches/z80@44731 -
2020-04-16 03:57:21 +00:00
nickysn
6b74573677
+ added a nodetype parameter to TZ80AddNode.GetResFlags
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git-svn-id: branches/z80@44730 -
2020-04-16 03:16:18 +00:00
nickysn
2e6b36f57d
+ initialize some common variables in TZ80AddNode.second_cmp16_32_64bit
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git-svn-id: branches/z80@44729 -
2020-04-16 03:11:35 +00:00
nickysn
f9e4f7b19b
+ introduced a TZ80AddNode.second_cmp16_32_64bit method, not implemented for now
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git-svn-id: branches/z80@44728 -
2020-04-15 23:38:40 +00:00
nickysn
90e2b9ecc6
+ implemented tcgz80.g_flags2reg
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git-svn-id: branches/z80@44696 -
2020-04-12 02:21:03 +00:00
nickysn
00f7fad1a6
+ support pushing word-sized parameters in tcgz80.a_load_ref_cgpara
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git-svn-id: branches/z80@44695 -
2020-04-11 21:29:28 +00:00
nickysn
87258f4004
- removed unused local vars of tcgz80.g_concatcopy
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git-svn-id: branches/z80@44693 -
2020-04-11 21:18:36 +00:00
nickysn
26e93d1e02
- removed unused method tcgz80.g_concatcopy_move
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git-svn-id: branches/z80@44692 -
2020-04-11 21:17:20 +00:00
nickysn
c6a066495a
+ implemented tcgz80.g_concatcopy in the general case, using the ldir instruction
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git-svn-id: branches/z80@44691 -
2020-04-11 21:15:55 +00:00
nickysn
1f8c1c1346
+ implemented more ref cases in tcgz80.a_loadaddr_ref_reg
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git-svn-id: branches/z80@44690 -
2020-04-11 16:44:51 +00:00
nickysn
472bc6c936
+ support symbol+base/index in tcgz80.a_loadaddr_ref_reg
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git-svn-id: branches/z80@44683 -
2020-04-11 01:19:13 +00:00
nickysn
4e5eb7fa4e
+ implemented tcgz80.a_loadaddr_ref_reg for symbol references
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git-svn-id: branches/z80@44682 -
2020-04-11 01:00:46 +00:00
nickysn
ca77f07013
* fixed offset to procedure/function parameters
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git-svn-id: branches/z80@44674 -
2020-04-09 23:48:47 +00:00
nickysn
e8cecafffa
+ implemented g_concatcopy for 1-byte copies from (IX+d)/(IY+d)/(HL) to (IX+d)/(IY+d)/(HL)
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git-svn-id: branches/z80@44673 -
2020-04-09 23:37:27 +00:00
nickysn
5aca5937e6
- cleaned up unused local variables and procedures from tcgz80.a_op_const_reg_internal and tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44670 -
2020-04-09 22:01:07 +00:00
nickysn
0e257a2c9f
- removed 2 unnecessary instructions for 8-bit OP_ROL/OP_ROR in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44669 -
2020-04-09 21:56:45 +00:00
nickysn
eb3c4546ab
+ implemented OP_SHL/OP_SHR/OP_SAR/OP_ROL/OP_ROR in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44668 -
2020-04-09 21:52:45 +00:00
nickysn
51e6a3f45b
+ implemented OP_SHL/OP_SHR/OP_SAR/OP_ROL/OP_ROR in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44665 -
2020-04-09 21:14:23 +00:00
nickysn
eb26cd55d4
+ implemented OP_XOR in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44661 -
2020-04-09 14:29:56 +00:00
nickysn
7a86d193cc
+ implemented OP_OR in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44660 -
2020-04-09 14:24:36 +00:00
nickysn
f00f39abef
+ implemented OP_AND in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44659 -
2020-04-09 14:21:57 +00:00
nickysn
5360770ed2
+ implemented OP_SUB in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44658 -
2020-04-09 13:41:28 +00:00
nickysn
75a2f0352e
* fixed 64-bit OP_ADD in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44657 -
2020-04-09 13:28:22 +00:00
nickysn
a419018ff0
+ handle fromsize>tosize in tcgz80.a_load_reg_reg
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git-svn-id: branches/z80@44656 -
2020-04-09 13:23:10 +00:00
nickysn
ce56125e40
+ implemented OP_ADD in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44655 -
2020-04-09 13:16:48 +00:00
nickysn
62cc60d081
* use register L for returning 8-bit values, DEHL for 32-bit values (SDCC-compatible)
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git-svn-id: branches/z80@44654 -
2020-04-09 00:11:39 +00:00
nickysn
3c8ed1cfbc
* use 8-bit registers for the function return regs
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git-svn-id: branches/z80@44653 -
2020-04-09 00:07:20 +00:00
nickysn
b896d2fea2
+ implemented sign extension in tcgz80.a_load_reg_ref
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git-svn-id: branches/z80@44652 -
2020-04-08 23:59:58 +00:00
nickysn
6fea99ac9d
+ implemented sign extension in tcgz80.a_load_ref_reg
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git-svn-id: branches/z80@44651 -
2020-04-08 23:57:26 +00:00
nickysn
df59c070a1
+ implemented sign extension in tcgz80.a_load_reg_reg
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git-svn-id: branches/z80@44650 -
2020-04-08 23:50:14 +00:00
nickysn
b84bcdaeee
+ implemented unsigned int extension in tcgz80.a_load_ref_reg
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git-svn-id: branches/z80@44648 -
2020-04-08 22:30:35 +00:00
nickysn
d0166242b3
+ support unsigned sign extension in tcgz80.a_load_reg_reg
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git-svn-id: branches/z80@44646 -
2020-04-08 20:23:16 +00:00
nickysn
7d9658e2ba
+ support unsigned expansion in tcgz80.a_load_reg_ref
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git-svn-id: branches/z80@44645 -
2020-04-08 20:12:17 +00:00
nickysn
5e94fbff54
+ added method make_simple_ref (empty for now, but will be implemented later)
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git-svn-id: branches/z80@44640 -
2020-04-07 23:12:33 +00:00
nickysn
7fd807905f
+ initial implementation of pushing ref params in tcgz80.a_load_ref_cgpara
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git-svn-id: branches/z80@44639 -
2020-04-07 22:55:33 +00:00
nickysn
c53cd30e7f
+ implemented tcgz80.a_load_reg_cgpara for pushing 1-byte parameters on the stack
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git-svn-id: branches/z80@44638 -
2020-04-07 22:34:05 +00:00
nickysn
4fc83a44d3
+ implemented byte-sized inc/dec by 1 in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44631 -
2020-04-07 01:03:02 +00:00
nickysn
0d04d198fe
+ emit warnings for unimplemented ops in tcgz80.a_op_const_reg_internal
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git-svn-id: branches/z80@44630 -
2020-04-07 00:55:54 +00:00
nickysn
b2549b63cd
* implemented pop_parasize for the Z80 and declared stdcall to be a clearstack pocall on this arch
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git-svn-id: branches/z80@44629 -
2020-04-07 00:07:34 +00:00
nickysn
472ac716b7
* mark the 8-bit versions of the registers as volatile when calling procedures/functions
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git-svn-id: branches/z80@44628 -
2020-04-06 23:31:20 +00:00
nickysn
f15b54085c
* fixed tcgz80.a_load_const_cgpara for pushing params on the stack
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git-svn-id: branches/z80@44627 -
2020-04-06 23:15:00 +00:00
nickysn
fe20a00711
* don't typecast the const to aint in taicpu.op_const_reg and .op_reg_const, because, on the Z80, aint
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is 8-bit (we treat it as having an 8-bit ALU), but it also has 16-bit instructions and registers,
that can take 16-bit consts
git-svn-id: branches/z80@44626 -
2020-04-06 23:12:02 +00:00
nickysn
3e3a392d88
* z80 regdat files regenerated
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git-svn-id: branches/z80@44625 -
2020-04-06 22:49:05 +00:00
nickysn
d8ca077c33
+ add externals as .globl directives in the sdcc-sdasz80 assembler output
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git-svn-id: branches/z80@44587 -
2020-04-04 23:15:57 +00:00
nickysn
c0b4e5c994
- removed the unused 's: topsize' parameter to TSdccSdasZ80Assembler.WriteOper
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git-svn-id: branches/z80@44586 -
2020-04-04 23:04:35 +00:00
nickysn
1b06b649a7
* use is_calljmp to determine whether to use WriteOper_jmp in the sdcc-sdasz80 asm writer. This fixes
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asm output for call instructions.
git-svn-id: branches/z80@44585 -
2020-04-04 23:03:13 +00:00
nickysn
fdc24164a0
+ implemented 8-bit signed comparisons as well
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git-svn-id: branches/z80@44583 -
2020-04-04 20:59:52 +00:00
nickysn
8a1be73ce0
* also use the unsigned 8-bit comparison code for 8-bit signed equal/unequal comparisons
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git-svn-id: branches/z80@44582 -
2020-04-04 20:28:53 +00:00
nickysn
55c18a11a0
- removed commented out code from TZ80AddNode.second_cmp
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git-svn-id: branches/z80@44581 -
2020-04-04 20:16:11 +00:00
nickysn
9dc8744b53
- removed debug writeln
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git-svn-id: branches/z80@44580 -
2020-04-04 20:15:10 +00:00
nickysn
59d7a45215
* generate more optimal code for unsigned 8-bit comparisons in TZ80AddNode.second_cmp
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git-svn-id: branches/z80@44579 -
2020-04-04 20:14:31 +00:00
nickysn
5585bdb6aa
+ also support unsigned 8-bit > and <= in TZ80AddNode.second_cmp. All 8-bit unsigned comparisons now
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work.
git-svn-id: branches/z80@44576 -
2020-04-04 17:49:13 +00:00
nickysn
f52f9dc56b
+ added a not-yet-complete implementation of TZ80AddNode.second_cmp. Only 8-bit unsigned comparison
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works for now, and only for the <,= and <> operators
git-svn-id: branches/z80@44575 -
2020-04-04 17:15:31 +00:00
nickysn
3ed692a157
+ implemented tcgz80.a_jmp_flags
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git-svn-id: branches/z80@44574 -
2020-04-04 17:07:54 +00:00
nickysn
ff655543ed
+ support conditional jumps in the sdcc-sdasz80 assembler writer
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git-svn-id: branches/z80@44573 -
2020-04-04 17:05:49 +00:00
nickysn
d05a632616
+ write jump operands (not all forms supported yet) in the sdcc-sdasz80 asm output
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git-svn-id: branches/z80@44572 -
2020-04-04 16:59:14 +00:00
nickysn
fb3a079916
* updated TAsmCond and TResFlags for the Z80
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git-svn-id: branches/z80@44571 -
2020-04-04 16:12:47 +00:00
nickysn
99e304165e
* fix for 64-bit OP_AND/OP_OR/OP_XOR in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44570 -
2020-04-04 15:33:01 +00:00
nickysn
c0b3eb70ac
+ fix for 64-bit OP_NOT in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44569 -
2020-04-04 15:30:43 +00:00
nickysn
5b8fd51b3a
+ implemented OP_NEG in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44568 -
2020-04-04 15:27:28 +00:00
nickysn
a362c3247d
+ added instruction encoding info for all the remaining Z80 instructions
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git-svn-id: branches/z80@44567 -
2020-04-04 13:49:07 +00:00
nickysn
c5aa1193bf
+ started describing the instructions encoding
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git-svn-id: branches/z80@44558 -
2020-04-04 02:35:15 +00:00
nickysn
4027ad18e0
+ added strict validation for the param types in z80ins.dat
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git-svn-id: branches/z80@44557 -
2020-04-04 02:11:20 +00:00
nickysn
20eab5582f
+ generate the Z80 instruction enum and string table from z80ins.dat via a newly created tool
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git-svn-id: branches/z80@44556 -
2020-04-04 01:36:07 +00:00
nickysn
565cc0e96b
+ created a parseable Z80 instruction description file, very loosely based on x86ins.dat. Parser not
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implemented yet, but will be soon.
git-svn-id: branches/z80@44554 -
2020-04-04 00:21:50 +00:00
nickysn
9309e2c42e
* replace 'add/adc/sub/sbc/and/or/xor/cp orgreg' with 'add/adc/sub/sbc/and/or/xor/cp spilltemp' in
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trgcpu.do_spill_replace
git-svn-id: branches/z80@44553 -
2020-04-03 22:42:02 +00:00
nickysn
e43834c5d0
* replace 'inc/dec orgreg' with 'inc/dec spilltemp' in trgcpu.do_spill_replace
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git-svn-id: branches/z80@44552 -
2020-04-03 22:19:40 +00:00
nickysn
9d545342f8
* replace 'add/adc/sub/sbc/and/or/xor/cp A,orgreg' with 'add/adc/sub/sbc/and/or/xor/cp A,spilltemp' in trgcpu.do_spill_replace
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git-svn-id: branches/z80@44537 -
2020-04-03 20:05:42 +00:00
nickysn
a58bab4318
+ replace 'ld orgreg,const' with 'ld spilltemp,const' in trgcpu.do_spill_replace
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git-svn-id: branches/z80@44536 -
2020-04-03 19:47:47 +00:00
nickysn
fe3f4a7447
* fixes in trgcpu.do_spill_replace
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git-svn-id: branches/z80@44535 -
2020-04-03 19:41:39 +00:00
nickysn
8ceee70912
* range check for spilltemp.offset in [-128..127], not [0..63] in trgcpu.do_spill_replace for Z80
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git-svn-id: branches/z80@44534 -
2020-04-03 19:32:10 +00:00
nickysn
8291d24b7f
* fix comment
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git-svn-id: branches/z80@44533 -
2020-04-03 18:53:52 +00:00
nickysn
bf8d560cc6
* treat all Z80 registers as 8-bit
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git-svn-id: branches/z80@44532 -
2020-04-03 18:53:10 +00:00
nickysn
5ddd0dd9b8
+ implemented a_load_const_ref for more efficient Z80 code generation for const assignment to local variables
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git-svn-id: branches/z80@44528 -
2020-04-03 02:23:05 +00:00
nickysn
4fe04ac53a
* write references of the type (IX+const), (IY+const) as const(IX) or const(IY), since that appears to
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be what sdcc-sdasz80 accepts
git-svn-id: branches/z80@44527 -
2020-04-03 01:33:41 +00:00
nickysn
4099c0eed8
+ initial implementation (not working yet) for spilling_create_store and spilling_create_load for Z80
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git-svn-id: branches/z80@44526 -
2020-04-03 01:03:49 +00:00
nickysn
e04d2acd6c
+ emit references with negative offsets correctly in the sdcc-sdasz80 asm output
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git-svn-id: branches/z80@44525 -
2020-04-03 00:54:22 +00:00
nickysn
4de1d5a8bf
+ Z80 stackframe generation
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git-svn-id: branches/z80@44524 -
2020-04-03 00:15:24 +00:00
nickysn
574fea7e63
+ ait_tempalloc asm output for sdcc-sdasz80
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git-svn-id: branches/z80@44523 -
2020-04-02 23:29:52 +00:00
nickysn
65efc495af
+ add edges to disallow the use of the 8-bit subregisters of IX, IY and SP
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git-svn-id: branches/z80@44513 -
2020-04-02 02:28:14 +00:00
nickysn
20cd3a6d1b
- removed GetLoad and GetStore from tcgz80. These came from AVR and I don't think they would be useful
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for Z80.
git-svn-id: branches/z80@44512 -
2020-04-02 02:20:34 +00:00
nickysn
c02fc4a49f
* fixed OP_NOT in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44511 -
2020-04-02 02:14:21 +00:00
nickysn
052313d649
* fixed OP_AND,OP_OR,OP_XOR in tcgz80.a_op_reg_reg_internal
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git-svn-id: branches/z80@44510 -
2020-04-02 02:04:18 +00:00
nickysn
d7675c6c81
+ support line info (-al) in the sdcc-sdasz80 asm output
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git-svn-id: branches/z80@44509 -
2020-04-02 01:19:17 +00:00
nickysn
cae1865f32
* fixes for OP_ADD and OP_SUB in a_op_reg_reg_internal. The destination of add/adc/sub/sbc can only be
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register NR_A.
git-svn-id: branches/z80@44508 -
2020-04-02 01:10:52 +00:00
nickysn
d26b5199c8
+ implemented a_load_ref_reg for fromsize=tosize for z80
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git-svn-id: branches/z80@44507 -
2020-04-02 01:01:58 +00:00
nickysn
3893baabd8
+ output nothing for ait_stab, ait_force_line and ait_function_name in the sdcc-sdasz80 asm writer
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git-svn-id: branches/z80@44506 -
2020-04-02 00:50:49 +00:00
nickysn
065a0d44d8
* tcg64favr renamed tcg64fz80
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git-svn-id: branches/z80@44504 -
2020-04-01 23:32:02 +00:00
nickysn
fc80874e63
+ implemented a_load_reg_reg for z80 for fromsize=tosize
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git-svn-id: branches/z80@44502 -
2020-04-01 22:43:10 +00:00
nickysn
662ca13f51
* use register NR_A in a_load_reg_ref for z80
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git-svn-id: branches/z80@44501 -
2020-04-01 22:40:02 +00:00
nickysn
54097433da
+ implemented cgsize2subreg for z80
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git-svn-id: branches/z80@44500 -
2020-04-01 22:29:33 +00:00
nickysn
c3ac9d06c8
+ support ait_datablock in the sdcc-sdasz80 asm output
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git-svn-id: branches/z80@44499 -
2020-04-01 22:13:47 +00:00
nickysn
fbadb3519f
+ implemented a_load_reg_ref for equal sized args for z80
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git-svn-id: branches/z80@44498 -
2020-04-01 22:08:46 +00:00
nickysn
fe5daf3d2f
+ initial implementation of top_ref reference output for sdcc-sdasz80
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git-svn-id: branches/z80@44497 -
2020-04-01 22:08:22 +00:00
nickysn
b1ea62f5f6
+ implemented ait_regalloc asm output for sdcc-sdasz80
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git-svn-id: branches/z80@44491 -
2020-04-01 19:05:22 +00:00
nickysn
b486e6b353
* define R_SUBWHOLE = R_SUBW for Z80
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git-svn-id: branches/z80@44490 -
2020-04-01 18:53:05 +00:00
nickysn
f87c837afe
+ implemented a_load_const_reg
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git-svn-id: branches/z80@44489 -
2020-04-01 18:22:41 +00:00
nickysn
aeedb0022d
+ initial implementation of operand writing (registers and constants only for now)
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git-svn-id: branches/z80@44488 -
2020-04-01 18:15:13 +00:00
nickysn
36a26a53ae
+ emit warning comments in the asm output for the unimplemented methods in cgcpu
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git-svn-id: branches/z80@44487 -
2020-04-01 17:16:56 +00:00
nickysn
2003020d68
+ emit lowercase instructions in the z80 asm output
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git-svn-id: branches/z80@44486 -
2020-04-01 14:09:44 +00:00
nickysn
050244e5f0
+ emit a ret instruction at the end of functions
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git-svn-id: branches/z80@44485 -
2020-04-01 14:05:00 +00:00
nickysn
03ea93de87
+ write eol after each instruction
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git-svn-id: branches/z80@44484 -
2020-04-01 14:04:20 +00:00
nickysn
dc1ff00418
* fixed register number of IX
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git-svn-id: branches/z80@44483 -
2020-04-01 13:36:59 +00:00
nickysn
d682df8bcd
+ implemented ait_instruction at least for instructions without operands
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git-svn-id: branches/z80@44476 -
2020-04-01 02:19:46 +00:00
nickysn
1d3f14f769
+ implemented ait_align asm output for sdcc-sdasz80
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git-svn-id: branches/z80@44475 -
2020-04-01 00:39:08 +00:00
nickysn
26549ed045
* use the :: and == operators to declare global labels, instead of .globl
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git-svn-id: branches/z80@44473 -
2020-03-31 21:59:56 +00:00
nickysn
4bc09f91cb
+ initial support for ait_section
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git-svn-id: branches/z80@44472 -
2020-03-31 21:09:50 +00:00
nickysn
b0f2902e51
+ support ait_symbol with value
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git-svn-id: branches/z80@44468 -
2020-03-31 19:45:09 +00:00
nickysn
58c4fb8db1
+ simplified adding the trailing : character when writing an ait_symbol for sdcc-sdasz80
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git-svn-id: branches/z80@44467 -
2020-03-31 19:42:39 +00:00
nickysn
bbc8629b39
- removed commented out code for handling case insensitive assemblers, because sdcc-sdasz80 is case sensitive by default
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git-svn-id: branches/z80@44466 -
2020-03-31 19:40:18 +00:00
nickysn
a670e04a3f
+ emit a .globl directive for global ait_symbols
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git-svn-id: branches/z80@44465 -
2020-03-31 19:37:11 +00:00
nickysn
6159b34608
* capitalize idtxt of z80asm, so it can be selected with -Az80asm
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git-svn-id: branches/z80@44459 -
2020-03-31 19:31:18 +00:00
nickysn
f3b9088d98
+ emit .globl for AB_GLOBAL labels
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git-svn-id: branches/z80@44453 -
2020-03-31 00:48:03 +00:00
nickysn
a4127ce3ab
* get rid of EscapeLabel, since sdcc-sdasz80 doesn't seem to need it
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git-svn-id: branches/z80@44452 -
2020-03-31 00:35:05 +00:00
nickysn
a38917f471
* fix missing comma in the middle of 64-bit ait_consts
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git-svn-id: branches/z80@44451 -
2020-03-31 00:31:46 +00:00
nickysn
416511e245
+ support aitconst_uleb128bit and aitconst_sleb128bit
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git-svn-id: branches/z80@44450 -
2020-03-31 00:30:00 +00:00
nickysn
ca1fd28ac1
* set unsupported constants to FIXME in the ait_const2str table
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* fix ait_const_16bit_unaligned
git-svn-id: branches/z80@44448 -
2020-03-30 23:59:41 +00:00
nickysn
c1888dd6e2
+ support 32-bit and 64-bit ait_consts
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git-svn-id: branches/z80@44447 -
2020-03-30 23:54:39 +00:00
nickysn
8589227fb0
* some ait_string and ait_const asm output fixes for sdcc-sdasz80
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git-svn-id: branches/z80@44446 -
2020-03-30 23:39:53 +00:00
nickysn
377f52ee69
+ started work on the sdcc-sdasz80 asm backend
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git-svn-id: branches/z80@44445 -
2020-03-30 23:31:04 +00:00
nickysn
e8bca88dad
+ output nothing for ait_symbol_end
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git-svn-id: branches/z80@44425 -
2020-03-30 02:25:58 +00:00
nickysn
b91269b821
+ output unsupported aligns as comments (I don't think z80asm supports an align directive)
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git-svn-id: branches/z80@44424 -
2020-03-30 02:24:27 +00:00