retfq x86 instructions. These are variants of the ret instruction with the
return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops
a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a
32-bit offset, followed by a 16-bit segment), etc.
git-svn-id: trunk@37571 -
instructions got erroneously converted to 'jmp/call v', if 'v' is an external
far variable that points to certain things (like a local label, exported via
public)
git-svn-id: trunk@37538 -
warning (on the i8086 target) or an error (on i386 and x86_64) when this
instruction is used (because it only works on 8086 and 8088 CPUs)
git-svn-id: trunk@37514 -
default segment base for the ref, in case there's no segment override
* in the internal assembler, use get_default_segment_of_ref to strip redundant
prefixes, instead of always assuming all refs are DS-based
git-svn-id: trunk@37486 -
* taicpu.needaddrprefix now uses is_32_bit_ref on x86_64
* is_16/32/64_bit_ref made part of the aasmcpu unit interface, so they can be
used elsewhere (e.g. in the inline assembler readers)
git-svn-id: trunk@37469 -
specified to be (%esi) or (%edi), when using at&t syntax assembler (this is
not considered an error by intel syntax assemblers, so we're not adding a
warning there, for now)
git-svn-id: trunk@37458 -
* when generating x86 code for parameterized string instructions with the
internal object writer, don't rely on the destination operand being [(r/e)di]
when determining the segment prefix, because when using intel syntax, source
and destination can be anything (only the operand size, the address size and
the source segment is taken into account)
git-svn-id: trunk@37452 -
is_x86_parameterless_string_instruction_op and
is_x86_parameterized_string_instruction_op by removing 'instruction' from
their names
git-svn-id: trunk@37451 -
get_x86_string_op_size
* refactored the AT&T inline asm handling of x86 parameterized string ops, so it
uses the new helper functions
git-svn-id: trunk@37449 -
(movs, cmps, scas, lods, stos, ins, outs) in the inline asm of the i8086, i386
and x86_64 targets. Both intel and at&t syntax is supported.
* NEC V20/V30 instruction 'ins' (available only on the i8086 target, because it
is incompatible with 386+ instructions) renamed 'nec_ins', to avoid conflict
with the 186+ 'ins' instruction.
git-svn-id: trunk@37446 -
* changed most of the variables in the assembler readers used to store constants from aint to tcgint
as aint has only the size of the accumular while some CPUs (AVR) allow larger constants in instructions
+ allow access to absolute symbols with address type in inline assembler
* allow absolute addresses in avr inline assembler
+ tests
git-svn-id: trunk@37411 -
(16-bit and 32-bit), i386 (16-bit and 32-bit) and x86_64 (32-bit and 64-bit).
Known bug: 32-bit addresses with an offset have their offset truncated to its
low 16-bits on i8086
git-svn-id: trunk@37409 -
process_ea_ref_64_32, process_ea_ref_32 and process_ea_ref_16, indicating
the address size they support; this is done, so that in the future, we can
mix them all on the same x86 architecture and support multiple address sizes
git-svn-id: trunk@37407 -
o improves readibility of TX86AsmOptimizer.OptPass1MOV and fixes some spelling mistakes
+ Optimization MovAnd2Mov 2
+ extended Optimization MovTestJxx2TestMov and MovTestJxx2ovTestJxx to take care of and as well
+ Peephole Optimization: movq x,%reg -> movd x,%reg
git-svn-id: trunk@37377 -
