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77 Commits

Author SHA1 Message Date
florian
810acd82b2 * patch by J. Gareth Moreton that makes some improvements to the Peephole Optimizer for x86 and x86-64 code, as well as some cleanup with formatting, code syntax consistency, and debug messages. 
- xorq %reg,%reg (identical registers) is now changed to xorl %reg,%reg if doing so removes the REX prefix.
  - movw %bx,%ax; andl $0xffff,%eax, for example, is now changed to movzwl %bx,%eax as long as a conditional operation doesn't follow 'and' (checks to see if the CPU flags are in use).
  - movzbq and movzwq get optimised to movzbl and movzwl respectively if doing so removes the REX prefix.
  - Removal of optimisation code that zero-extends from 32-bit to 64-bit, because there isn't actually a valid combination of opcodes for MOVZX that allows that (for registers,
    just use  MOV). This is not the case with MOVSX.
  - movq is now optimised to movl even if the CPU flags are in use (this stops mov %reg,0 from being optimised to xor %reg,%reg if doing so breaks an algorithm that relies on them).
  - Fixed typo in peephole message regarding movq to movl (it said movd instead).
  - Made the peephole debug messages more consistent in formatting, some of which now have more detail.
* small fixes of the patch

git-svn-id: trunk@38070 -
 2018-01-28 14:41:54 +00:00
florian
10ea652493 * fix for #32576 
+ test case

git-svn-id: trunk@38069 -
 2018-01-28 13:26:49 +00:00
florian
93353d8d79 * typo 
git-svn-id: trunk@38068 -
 2018-01-28 13:26:47 +00:00
florian
674398c5a5 * i8086 compilation fixed after r37572 
git-svn-id: trunk@37573 -
 2017-11-11 13:25:02 +00:00
florian
73fda1ccb6 * factored out OptPass1Sub 
+ make use of OptPass1Sub on x86_64 and i8086 as well

git-svn-id: trunk@37572 -
 2017-11-10 20:55:22 +00:00
florian
4da4b768ec * factored out PostPeepholeOptTest 
+ use PostPeepholeOptTest on x86-64

git-svn-id: trunk@37551 -
 2017-11-04 19:10:14 +00:00
florian
3097eaf8ee * made PostPeepholeOptMov a function 
git-svn-id: trunk@37550 -
 2017-11-04 19:10:12 +00:00
florian
a7ea7fb569 * factored out PostPeepholeOptCmp 
+ use PostPeepholeOptCmp for x86_64

git-svn-id: trunk@37549 -
 2017-11-04 19:10:09 +00:00
nickysn
80226e3af4 + added an optimization pass, that optimizes x86 references 
git-svn-id: trunk@37494 -
 2017-10-20 15:55:55 +00:00
florian
ce7487b7de o patch by J. Gareth "Kit" Moreton, resolves partially issue #32037 
o improves readibility of TX86AsmOptimizer.OptPass1MOV and fixes some spelling mistakes
  + Optimization MovAnd2Mov 2
  + extended Optimization MovTestJxx2TestMov and MovTestJxx2ovTestJxx to take care of and as well
  + Peephole Optimization: movq x,%reg -> movd x,%reg

git-svn-id: trunk@37377 -
 2017-10-01 18:40:11 +00:00
florian
15b617546e + call TX86AsmOptimizer.OptPass1VOP for logical operations as well 
git-svn-id: trunk@37367 -
 2017-10-01 14:40:21 +00:00
florian
05ecd784f2 * factored out OptPass1LEA and use it for x86-64 as well 
+ LEAMov2LEA optimization

git-svn-id: trunk@37199 -
 2017-09-13 20:40:32 +00:00
florian
22956c4393 + TX86AsmOptimizer.OptPass1OP 
git-svn-id: trunk@36365 -
 2017-05-28 13:49:43 +00:00
florian
c83e6991d5 * properly check number of operands 
git-svn-id: trunk@36322 -
 2017-05-25 12:44:30 +00:00
yury
884cb758e7 * Ensure the number of operands is 2 for MOVXX instructions in OptPass1MOVXX. Otherwise the classic MOVSD/W/B no-operand instructions (REP MOVSX) cause AV during checks of operands. The AV is thrown when trying to compile ucomplex.pp with -Cfsse3. 
* Also fixed generation of debug comments in OptPass1MOVXX.

git-svn-id: trunk@36295 -
 2017-05-22 15:20:18 +00:00
florian
3c5ec4e76c * allocate register correctly for "MovMov2Mov 2" 
+ more debug messages
* debug message naming fixed

git-svn-id: trunk@36284 -
 2017-05-21 15:06:22 +00:00
florian
1ffdf02b94 + Ch_*Op4 
+ op_const_reg_reg_reg

git-svn-id: trunk@36279 -
 2017-05-21 11:12:55 +00:00
florian
0f16f6d94d + OptPass1MOVXX 
git-svn-id: trunk@36209 -
 2017-05-14 20:59:10 +00:00
florian
535c990233 + OptPass1MOVAP 
git-svn-id: trunk@36203 -
 2017-05-13 21:48:44 +00:00
florian
3ade6ae9b8 + Mov2Nop optimization 
git-svn-id: trunk@36201 -
 2017-05-13 09:58:27 +00:00
florian
f4a29bb75d * moved InstructionLoadsFromReg and RegReadByInstruction from TCpuAsmOptimizer (i386) to TX86AsmOptimizer 
git-svn-id: trunk@36200 -
 2017-05-13 09:58:25 +00:00
florian
f93b784895 * make fullcycle for i8086 fixed 
git-svn-id: trunk@36164 -
 2017-05-09 19:53:06 +00:00
florian
52d3756c26 * factored out OptPass1Movx and merged i386 and x86-64 version 
git-svn-id: trunk@36159 -
 2017-05-08 20:44:27 +00:00
florian
06c4c651fd * factored out PrePeepholeOptSxx 
+ x86-64 uses PrePeepholeOptSxx now as well

git-svn-id: trunk@36158 -
 2017-05-08 20:44:24 +00:00
florian
74b338266d * ifdef cmov optimization, as i8086 has no cpu_capabilities 
git-svn-id: trunk@36150 -
 2017-05-07 16:18:44 +00:00
florian
f8d517be70 * make TX86AsmOptimizer.IsExitCode usable for x86-64 as well 
git-svn-id: trunk@36148 -
 2017-05-07 16:18:40 +00:00
florian
4a43d992f5 * unified usage of MatchOpType 
* fixed generic MatchOpType

git-svn-id: trunk@36145 -
 2017-05-07 16:18:33 +00:00
florian
7afe762d22 * factored out OptPass2Jcc assembler optimization 
* OptPass2Jcc now used by x86-64 as well
* remove orphaned alignments if the label is not used anymore after cmov is used

git-svn-id: trunk@36143 -
 2017-05-07 12:45:48 +00:00
florian
e3f0b338d4 * SkipLabels moved to aoptutils 
* factored out OptPass2Jmp assembler optimization
* OptPass2Jmp now used by x86-64 as well

git-svn-id: trunk@36141 -
 2017-05-06 21:07:02 +00:00
florian
f985971a62 * apply mov reg1, mem1; cmp x, mem1 to mov reg1, mem1; cmp x, reg1 also for test 
git-svn-id: trunk@36138 -
 2017-05-06 18:47:47 +00:00
nickysn
b882ba5fd2 + also recognize sbb reg,reg as writing a new value in the register in TX86AsmOptimizer.RegLoadedWithNewValue 
git-svn-id: trunk@36119 -
 2017-05-05 14:24:13 +00:00
nickysn
0e0e5c0caf + support the flags register and its subregisters in TX86AsmOptimizer.RegLoadedWithNewValue 
git-svn-id: trunk@36114 -
 2017-05-05 12:17:50 +00:00
nickysn
85fbbec319 + recognize xor reg,reg (same register twice) and sub reg,reg as writing a new 
value to reg in TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36112 -
 2017-05-05 11:01:34 +00:00
nickysn
aa93259463 + support the lahf,fstsw and fnstsw instructions in 
TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36087 -
 2017-05-04 16:02:01 +00:00
nickysn
92cc447326 + support the aam instruction in TX86AsmOptimizer.RegLoadedWithNewValue 
git-svn-id: trunk@36083 -
 2017-05-04 15:34:48 +00:00
nickysn
2431b1fa19 + support the lodsb,lodsw,lodsd and lodsq instructions in 
TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36082 -
 2017-05-04 15:12:37 +00:00
nickysn
6b7593d7d0 + support the SETcc instructions in TX86AsmOptimizer.RegLoadedWithNewValue 
git-svn-id: trunk@36081 -
 2017-05-04 14:43:18 +00:00
nickysn
e10f184b74 + support lds,les,lfs,lgs and lss in TX86AsmOptimizer.RegLoadedWithNewValue 
git-svn-id: trunk@36079 -
 2017-05-04 14:08:36 +00:00
nickysn
eac74f5a81 + support the cwd,cdq,cqo and cbw instructions in 
TX86AsmOptimizer.RegLoadedWithNewValue (cwde and cdqe don't need special
  support)

git-svn-id: trunk@36077 -
 2017-05-04 12:15:40 +00:00
nickysn
1a139b951d + properly support the one operand version of imul and mul in 
TX86AsmOptimizer.RegLoadedWithNewValue

git-svn-id: trunk@36068 -
 2017-05-03 15:07:21 +00:00
nickysn
65960048c8 * fixed TX86AsmOptimizer.RegLoadedWithNewValue for 3-operand imul, where the 
second operand is a memory reference

git-svn-id: trunk@36067 -
 2017-05-03 13:43:16 +00:00
nickysn
1f5aec6d3d + make use of the Reg1WriteOverwritesReg2Entirely and Reg1ReadDependsOnReg2 
instead of SuperRegistersEqual in TX86AsmOptimizer.RegLoadedWithNewValue, so
  it returns correct information for the 16-bit and 8-bit subregisters
  (including AH,BH,CH and DH)

git-svn-id: trunk@36066 -
 2017-05-03 12:14:30 +00:00
nickysn
66c350d8d2 * fixed access violation bug in TX86AsmOptimizer.RegLoadedWithNewValue for the 
A_MOVSD string instruction

git-svn-id: trunk@35995 -
 2017-04-28 13:09:27 +00:00
nickysn
e6e55b3004 + added function TX86AsmOptimizer.Reg1ReadDependsOnReg2, which checks whether 
two registers are independent (taking into account AH vs AL)

git-svn-id: trunk@35991 -
 2017-04-28 09:24:48 +00:00
nickysn
33f9b36a54 + added and implemented function TX86AsmOptimizer.Reg1WriteOverwritesReg2Entirely, 
which takes into account how 16-bit and 8-bit subregisters work on the x86
  (the new function is not used for now, but is probably going to replace
  SuperRegistersEqual in a few specific places (in RegLoadedWithNewValue),
  so that our register tracking becomes more accurate for 8-bit and 16-bit
  subregisters)

git-svn-id: trunk@35990 -
 2017-04-27 22:30:47 +00:00
yury
94a65e99f1 * Removed unused var. 
git-svn-id: trunk@35546 -
 2017-03-09 13:49:46 +00:00
florian
f68558b88c * factored out TX86AsmOptimizer.OptPass2Imul 
git-svn-id: trunk@35252 -
 2017-01-06 22:25:24 +00:00
florian
ebb2b81f79 * FoldLea optimizes more cases 
git-svn-id: trunk@35251 -
 2017-01-06 22:25:22 +00:00
florian
781d6f31a8 * more getsupreg(...)<>/=getsupreg(...) replaced by SuperRegisterEqual which is more safe, the former could break as the register could have different register types 
git-svn-id: trunk@34746 -
 2016-10-20 18:32:23 +00:00
florian
cf2a3d8160 + new debug message 
* turn off accidently turned on DEBUG_AOPTCPU

git-svn-id: trunk@34731 -
 2016-10-16 16:37:51 +00:00