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d22dc68fda
Commit Graph

16875 Commits

Author SHA1 Message Date
Károly Balogh
d22dc68fda * fixed DFA warnings for MIPS and AVR 
git-svn-id: trunk@28502 -
 2014-08-20 15:05:43 +00:00
Károly Balogh
6122db7d40 * fix warnings when compiling the compiler with DFA optimizer enabled on PowerPC 
git-svn-id: trunk@28501 -
 2014-08-20 14:31:36 +00:00
Károly Balogh
0cf7357ee2 * fix GetResFlags DFA optimizer warning on Sparc and AVR too 
git-svn-id: trunk@28500 -
 2014-08-20 13:52:28 +00:00
Károly Balogh
392da9e43f * fix warnings when compiling the compiler with DFA optimizer enabled on m68k 
git-svn-id: trunk@28499 -
 2014-08-20 13:49:47 +00:00
Károly Balogh
09608a1c28 * fix warnings when compiling the compiler with DFA optimizer enabled on ARM 
git-svn-id: trunk@28498 -
 2014-08-20 13:16:58 +00:00
Károly Balogh
07ad2a04ac * fix warnings when compiling the compiler with DFA optimizer enabled on i386 
git-svn-id: trunk@28497 -
 2014-08-20 12:28:44 +00:00
Károly Balogh
249a60b28b x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run. 
git-svn-id: trunk@28496 -
 2014-08-20 10:21:06 +00:00
Jonas Maebe
a4a54fa344 * removed unnecessary "as" expressions 
git-svn-id: trunk@28471 -
 2014-08-19 20:11:52 +00:00
Károly Balogh
03a0f7b409 AROS: improved version of the previous commit, pass the stripping option to the linker instead, seems to work. 
git-svn-id: trunk@28466 -
 2014-08-19 11:30:02 +00:00
Károly Balogh
883e71f18e AROS: stripping of executables on i386 works now 
git-svn-id: trunk@28465 -
 2014-08-19 11:03:31 +00:00
Károly Balogh
4ee15b84da AROS: syscall (library call) support for based on the Amiga/68k and MorphOS/PPC versions 
git-svn-id: trunk@28463 -
 2014-08-19 00:39:18 +00:00
Jonas Maebe
83c7dbb7a6 * fixed copy/paste error that caused all warnings to be disabled after 
compiling the symdef unit while building a compiler for a non-64 bit
    code generator

git-svn-id: trunk@28462 -
 2014-08-18 23:03:54 +00:00
Jonas Maebe
ee76e8dbf5 * fixed warning about always-true comparison when compiling a 16 bit target 
git-svn-id: trunk@28461 -
 2014-08-18 23:02:12 +00:00
Jonas Maebe
7e3abd4b38 * fixed warning about signed integer to pointer conversion 
git-svn-id: trunk@28460 -
 2014-08-18 23:00:53 +00:00
Jonas Maebe
4005290b54 * aint -> asizeint (immediate operand vs offset size) 
git-svn-id: trunk@28459 -
 2014-08-18 23:00:17 +00:00
Jonas Maebe
f55516ed32 * changed forcesize parameter of tgobj.gethltemp() from aint into asizeint, 
as that one represents memory sizes while aint represents code generator
    immediate operands

git-svn-id: trunk@28458 -
 2014-08-18 22:36:43 +00:00
Jonas Maebe
e7ac66a6c4 * removed nested comments 
git-svn-id: trunk@28457 -
 2014-08-18 22:34:35 +00:00
Jonas Maebe
e21d31dc99 * fixed compilation with range checking enabled 
git-svn-id: trunk@28447 -
 2014-08-18 20:06:27 +00:00
Károly Balogh
8627cc3ddb AROS: added remark about collect-aros issue, fixed ld name for x86_64 target 
git-svn-id: trunk@28444 -
 2014-08-18 16:17:06 +00:00
Károly Balogh
2f086129e1 AROS: use collect-aros to link. also support binutils prefixes. 
git-svn-id: trunk@28443 -
 2014-08-18 14:55:02 +00:00
Károly Balogh
74581a07af AROS: assembler fixes 
git-svn-id: trunk@28439 -
 2014-08-18 11:25:55 +00:00
Károly Balogh
da7efb8607 AROS: regenerated Makefiles to support i386-aros 
git-svn-id: trunk@28438 -
 2014-08-17 23:16:47 +00:00
Károly Balogh
1410838aa7 AROS: and also add the system info/target units which were forgotten in the previous commit 
git-svn-id: trunk@28433 -
 2014-08-17 18:36:57 +00:00
Károly Balogh
4431ba2c08 merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run. 
git-svn-id: trunk@28432 -
 2014-08-17 18:18:07 +00:00
Károly Balogh
ccc9bc0941 m68k: plain 68000 also needs extra handling for large offsets 
git-svn-id: trunk@28423 -
 2014-08-16 15:14:34 +00:00
Károly Balogh
9b0bf91076 m68k: do not generate CLR instructions to memory references on plain 68k. there this instruction also causes reads from the address, which is slow and can have side effects. 
git-svn-id: trunk@28422 -
 2014-08-16 13:03:03 +00:00
Jonas Maebe
5e280b3131 * don't convert movs into (the non-existing) ldrs in do_spill_replace() 
git-svn-id: trunk@28390 -
 2014-08-12 20:14:24 +00:00
florian
499dd078e3 + automatically insert fma inlines into floating point code if possible and fastmath is activated 
git-svn-id: trunk@28382 -
 2014-08-11 20:50:21 +00:00
sergei
482e61dafa * MIPS, TCpuAsmOptimizer.GetNextInstructionUsingReg: test that returned item is actually an instruction, because GetNextInstruction can sometimes stop on labels. 
+ Try to eliminate register move after instructions that load from memory.

git-svn-id: trunk@28380 -
 2014-08-10 21:31:13 +00:00
sergei
f1d1fd4f24 * Inserted explicit typecasts in order to prevent range check errors at some places where signed and unsigned types are assigned to each other (mostly MIPS-specific, but one was necessary in generic code). 
git-svn-id: trunk@28379 -
 2014-08-10 21:26:14 +00:00
masta
96915b3f0c 16bit Thumb is not able to use tst with an immediate value 
r28315 introduced an arm optimization which requires
  tst rX, #imm
to work. This is not available on 16bit thumb, I've disabled that
optimization on thumb for now.

git-svn-id: trunk@28360 -
 2014-08-10 15:30:44 +00:00
masta
7e22bd53b6 Changed ARMs StrLdr2StrMov peephole optimizer look further ahead 
StrLdr2StrMov now uses GetNextInstructionUsingRef to find an instruction
which uses the same Reference. In one of our internal testcases it
speeded up a function by 15% as fpc generated a lot of spilling.

git-svn-id: trunk@28344 -
 2014-08-08 15:31:10 +00:00
masta
bfa85218fa Introduce TCpuAsmOptimizer.GetNextInstructionUsingRef 
It's the counterpart to GetNextInstructionUsingReg and finds the next
instruction to use the same reference. By default it stops searching
when hitting a store instructions to avoid aliasing issues.

git-svn-id: trunk@28343 -
 2014-08-08 15:31:06 +00:00
masta
d1c5f89976 Make Next an Out-parameter in ARMs GetNextInstructionUsingReg 
The input to Next is not used, reflect that properly.

git-svn-id: trunk@28342 -
 2014-08-08 15:31:01 +00:00
nickysn
94bcb9878a * reimplemented r28329 in a different way, as suggested by Jonas 
git-svn-id: trunk@28332 -
 2014-08-07 19:36:52 +00:00
nickysn
3164bf66f5 + implemented correct [] indexing of huge pointers 
git-svn-id: trunk@28330 -
 2014-08-07 09:11:21 +00:00
nickysn
dfcbe03572 + added x86-specific function getx86pointerdef, similar to getpointerdef, but 
allows creating the x86 special pointer types as well

git-svn-id: trunk@28329 -
 2014-08-07 08:50:01 +00:00
nickysn
4ea551a0f7 * is_farpointer and is_hugepointer moved from defutil to symcpu 
git-svn-id: trunk@28328 -
 2014-08-06 20:32:41 +00:00
masta
b898b169d4 Fixed 0-cmp optimization in tarmaddnode.second_cmp64bit 
Commit r28315 prevented "= 0" compare-optimizations. Should be fixed now.

git-svn-id: trunk@28317 -
 2014-08-06 15:01:24 +00:00
masta
c88fdb6a4a Add minor optimization for int64 < 0 on arm 
This is a very common construct in normal code and also heavily used in
softfpu code.

The ARM-cg will now just test for the MSB of reghi to be set, instead of
a full comparison against constant 0.

git-svn-id: trunk@28315 -
 2014-08-05 21:31:20 +00:00
sergei
b9763d270a + Enabled section smartlinking for m68k-linux. 
git-svn-id: trunk@28302 -
 2014-08-02 23:00:36 +00:00
Legolas
a52e51d0b7 * Updated libndsfpc and nds linkerscript to Ver. 1.5.8 
git-svn-id: trunk@28299 -
 2014-08-02 15:23:51 +00:00
sergei
a28d6a84a7 + m68k, a_load_const_reg: use MOV3Q if applicable for data registers as well, since it allows spilling replacement of destination. 
+ a_load_const_ref: use CLR and MOV3Q if possible.
* a_cmp_reg_reg_label: force size to 32 bits for ISA_A and ISA_A+ targets.
+ support for stack frames larger than 32767 bytes.

git-svn-id: trunk@28298 -
 2014-08-02 12:46:34 +00:00
sergei
499ff505c8 * m68k: further improved code generation for comparison nodes, support LOC_REFERENCE for 32-bit compares and omit low dword, when possible, for 64-bit ones. 
git-svn-id: trunk@28297 -
 2014-08-02 12:37:40 +00:00
sergei
b4d9d97a03 * m68k: don't do replace spilling if spilltemp.offset exceeds 16 bits on Coldfire targets. 
git-svn-id: trunk@28296 -
 2014-08-02 12:33:32 +00:00
sergei
3da5de0e5f + m68k, do_spill_replace: support more cases. 
+ support spilling at offsets >32767, tested only to generate assemble-able code, support of large stack frames needs more changes elsewhere.

git-svn-id: trunk@28295 -
 2014-08-01 20:32:48 +00:00
masta
7a0c79de60 Fix for AndLsl2Lsl in ARM Peephole optimizer 
AndLsl2Lsl assigned the wrong register to the remaining instruction, and
also did not check for the register.

git-svn-id: trunk@28285 -
 2014-07-31 23:09:33 +00:00
masta
85d208fea4 Fix ARM LoadScheduler in case of Pre/PostIndexed addressing 
There was an interference between the load scheduler and then
Str/LdrAdd/Sub2Str/Ldr peephole optimizer.

ldrb r0, [r2]
ldrb r1, [r2, #1]
orr r3, r0, r1
add r2, r2, #2

got changed pre-regalloc to:
ldrb r1, [r2, #1]
ldrb r0, [r2]
orr r3, r0, r1
add r2, r2, #2

and the peephole optimizer collapsed the add into the second ldrd:
ldrb r1, [r2, #1]
ldrb r0, [r2], #2
orr r3, r0, r1

Then the post-peephole optimizer changed that into:
ldrb r0, [r2], #2
ldrb r1, [r2, #1]
orr r3, r0, r1

so r1 got loaded from a modified base-register.

This patch prevents the scheduler from moving an ldr-instruction if it
uses Pre/Post-indexing and the instruction before it uses the
base-register.

git-svn-id: trunk@28284 -
 2014-07-31 19:57:09 +00:00
sergei
2c8264c42b * m68k: partially improved code generation for comparisons. 
git-svn-id: trunk@28283 -
 2014-07-31 18:44:07 +00:00
sergei
01c8ee158d - removed unused variables 
git-svn-id: trunk@28282 -
 2014-07-31 18:35:55 +00:00