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d3abd339b7
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1543 Commits

Author SHA1 Message Date
florian
d3abd339b7 + cpu switch for zen 2022-11-11 23:45:52 +01:00
J. Gareth "Curious Kit" Moreton
aa5517d442 * x86: New CPU feature flags in cpuinfo units 2022-11-11 22:29:58 +00:00
J. Gareth "Curious Kit" Moreton
6757bf3832 * x86: New SHR-based optimisations 2022-09-16 16:57:55 +00:00
J. Gareth "Curious Kit" Moreton
de650dea55 * x86: Fixed minor logic bug in aoc_ForceNewIteration check where UpdateUsedRegs was called at the wrong time. 2022-07-27 16:26:07 +01:00
Jonas Maebe
75c16b6126 llvm: support for getting the llvm rtl (rt) architecture name 
This is the name used as part of the llvm rt libraries, like
asan (address sanitizer)
 2022-07-24 14:36:13 +02:00
J. Gareth "Curious Kit" Moreton
9432a550e1 * x86: Bug fix where aoc_ForceNewIteration was 
checked in the wrong pass.
 2022-07-23 12:58:20 +00:00
florian
f6b5c513bb * patch by Rika: makes #39786 work on more setups, resolves #39786 2022-07-07 23:00:47 +02:00
Sven/Sarah Barth
7f3a5eb9ab * extend tabstractprocdef.getcopyas by a parameter to control whether the copy should be registered or not 2022-05-26 21:42:59 +02:00
J. Gareth "Curious Kit" Moreton
6f24c8b4ef * x86: Code generation fixes where FLAGS 
register is not properly allocated.
 2022-04-27 20:46:32 +00:00
J. Gareth "Curious Kit" Moreton
627fb9a25b * x86: New jump/label tracking in CrossJump optimisations 2022-04-24 16:42:35 +00:00
florian
fab610a927 * call OptPass1_V_MOVAP for MOVDQA on i386 2022-04-19 22:35:02 +02:00
florian
0e4188749b * started with change information for AVX-512 2022-03-29 22:50:14 +02:00
florian
16881556b9 * change information for AVX-512 mask register instructions 2022-03-28 22:37:09 +02:00
florian
c3ec62878e * completed change information for AVX-2 2022-03-27 23:06:18 +02:00
florian
6ea0050990 * finished change information for AVX1 instructions 2022-03-26 23:44:59 +01:00
florian
2f33c97006 * more change information 2022-03-25 23:17:57 +01:00
florian
6a56ed24ab * another change information update 2022-03-24 22:33:27 +01:00
florian
fbf68af605 * continued to update change information 2022-03-23 21:43:08 +01:00
florian
fba3da47c6 * continued to update change information 2022-03-22 22:55:37 +01:00
florian
de98803751 * few more updated change information entries 2022-03-21 22:51:52 +01:00
florian
c785fa4435 * AES instruction change information fixed 2022-03-20 22:32:23 +01:00
florian
2099e35d82 * change information for SSE 4.2 instructions 2022-03-19 23:15:49 +01:00
florian
6421f2c36b * change information for SSE4.1 instructions 2022-03-18 23:23:31 +01:00
florian
a9db41f1e5 * fixed SSSE3 change information 2022-03-17 22:48:44 +01:00
florian
f5de329076 * change information updates 2022-03-16 23:03:58 +01:00
florian
e9ee0a0be3 * more change information updated 2022-03-15 22:37:49 +01:00
florian
50b6978e68 * more change information updates 2022-03-14 23:11:14 +01:00
florian
b1a72a86e5 * more change information fixed 2022-03-12 22:42:02 +01:00
florian
5e0d5cd92e * fix change information for a lot of MMX instructions 2022-03-11 22:46:51 +01:00
florian
27fb9086aa * cleanup: cs_opt_loopunroll is a generic optimization for a long time already 2022-03-08 23:03:18 +01:00
J. Gareth "Curious Kit" Moreton
fe39f9ca21 Fixed bug on x86 platforms where the stack pointer was not allocated if it was different to the frame pointer 2022-02-08 20:47:47 +00:00
J. Gareth "Curious Kit" Moreton
f8e04aad03 CMOV now modifies rather than writes to the destination register so RegUsedAfterInstruction behaves properly 2022-01-28 20:17:24 +00:00
florian
6404478ea4 * cleanup of VER3_0 defines 2021-11-17 22:19:57 +01:00
J. Gareth "Curious Kit" Moreton
2dc0995067 - Bug fix to new ADD/SUB optimisation where conditions are concerned 
- Register allocation fixes for overflow checks
 2021-11-17 20:18:57 +00:00
Yuriy Sydorov
b78761efd3 * Removed obsolete OLDREGVARS ifdefs. 2021-11-02 17:08:08 +02:00
J. Gareth "Curious Kit" Moreton
b58fdc3e58 Improved ADD and SUB optimisations for LEA instructions 2021-10-31 15:44:00 +00:00
florian
ff3acfb8cd * cleanup of 2.7.0 defines 2021-10-31 13:20:28 +01:00
J. Gareth "Curious Kit" Moreton
fd28cc0db0 Better handling of zeroing upper parts of registers 
Better handling of zeroing upper parts of registers
 2021-10-16 14:42:19 +02:00
J. Gareth "Curious Kit" Moreton
674ed4069a Expanded MM block move to include YMM registers under AVX 2021-10-16 14:17:41 +02:00
florian
07413be8b5 + being able to define change information for xmm0 
* corrected change information for SHA256RNDS2
 2021-10-10 23:07:23 +02:00
florian
2c180cf101 * by default, DEBUG_AOPTCPU is only enabled if the compiler is compiled with -dEXTDEBUG 2021-10-10 15:35:38 +02:00
florian
6c7e6191f6 + support of SHA extension in the internal assembler 2021-10-09 15:44:46 +02:00
florian
ec40db3da7 + (V)Cvtss2CvtSd(V)Cvtsd2ss2Nop optimization, resolves #39360 2021-10-06 21:57:24 +02:00
Yuriy Sydorov
4a7a113a30 * x86: Fixed attributes of the LEAVE instruction - it reads EBP. 
This fixes crashes with -O3s in some cases due to an incorrect peephole
  optimization.
 2021-09-15 22:30:00 +03:00
florian
ef31e8c2ed Merge remote-tracking branch 'origin/main' into tg74/avx512-0037785 2021-08-22 19:20:15 +02:00
florian
61a3f6603d * change information for round* fixed 2021-08-20 23:55:17 +02:00
florian
a45123a87b * fix change information for popcnt 2021-08-19 23:01:59 +02:00
Florian Klämpfl
62baa89646 Merge remote-tracking branch 'origin/main' into tg74/avx512-0037785 
# Conflicts:
#	.gitattributes
#	compiler/msgidx.inc
#	compiler/msgtxt.inc
 2021-08-10 23:30:02 +02:00
florian
c67d35b8cc * patch by J. Gareth Moreton: x86: Minor bitwise optimisations, resolves #39299 
git-svn-id: trunk@49614 -
 2021-07-16 21:47:36 +00:00
florian
7d6b01bfc4 + SHXXMov2SHXX optimization 
git-svn-id: trunk@49579 -
 2021-07-05 21:07:46 +00:00