Commit Graph

110 Commits

Author SHA1 Message Date
tg74
dbfff3f76a bugfix movss/vmovss
git-svn-id: branches/tg74/avx512-0037785@47389 -
2020-11-11 16:26:49 +00:00
tg74
99882e8d59 bugfix internal assembler compiling vpmov*
git-svn-id: branches/tg74/avx512-0037785@47386 -
2020-11-11 05:07:56 +00:00
tg74
7eb20b88a9 cleanup
git-svn-id: branches/tg74/avx512-0037785@47352 -
2020-11-08 22:16:55 +00:00
tg74
3f05580f21 clean up
git-svn-id: branches/tg74/avx512-0037785@47281 -
2020-11-02 05:22:22 +00:00
tg74
d8fa3dd4ed bugfix external gnu-assembler - special handling suffix vcvtpd.. destination operand = xmm =>> suffix x, destination ymm or zmm =>> no suffix
git-svn-id: branches/tg74/avx512-0037785@47145 -
2020-10-20 08:00:39 +00:00
tg74
c65b042856 bugfix opcodes cvt.., vcvt.. memory operands and typesize
git-svn-id: branches/tg74/avx512-0037785@47113 -
2020-10-15 08:22:29 +00:00
yury
1b3a3a7983 * Removed lot of unused local vars. It is useful to turn on the notes in options. :)
git-svn-id: trunk@44053 -
2020-01-28 18:45:33 +00:00
florian
b7c6e01b03 * cleaning up tcgsize: it makes no sense to declare every combination and type
the different vector types must be either handled in the high level cg or
    by using the shuffle parameter

git-svn-id: trunk@43860 -
2020-01-04 21:54:53 +00:00
tg74
df199fbe23 bugfix 35700 xmmrm - zmmrm, mem32/64
git-svn-id: branches/tg74/avx512merge@42956 -
2019-09-08 19:13:42 +00:00
tg74
06e5149972 bugfix 35700 and cleanup
git-svn-id: branches/tg74/avx512merge@42833 -
2019-08-26 18:55:32 +00:00
tg74
9baf452681 Bugfix GATHER/SCATTER memref
git-svn-id: branches/tg74/avx512merge@42723 -
2019-08-18 04:39:36 +00:00
florian
5947143d8f * intel asm reader: try to read avx512 extensions only if the instruction supports them
* cleanup

git-svn-id: trunk@42656 -
2019-08-12 10:46:19 +00:00
florian
4c9a0403f4 * compilation on i386 fixed
git-svn-id: trunk@42655 -
2019-08-11 19:35:34 +00:00
florian
7f8dc75604 -- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«:
U    compiler/i8086/r8086int.inc
U    compiler/i8086/r8086nor.inc
U    compiler/i8086/r8086rni.inc
U    compiler/i8086/r8086std.inc
U    compiler/i386/i386prop.inc
U    compiler/i386/i386att.inc
U    compiler/i386/i386atts.inc
U    compiler/i386/i386int.inc
U    compiler/i8086/i8086int.inc
U    compiler/i8086/i8086op.inc
U    compiler/i8086/r8086dwrf.inc
U    compiler/i8086/r8086ari.inc
U    compiler/i8086/r8086con.inc
U    compiler/i8086/r8086nasm.inc
U    compiler/i8086/r8086num.inc
U    compiler/i8086/r8086stab.inc
U    compiler/i386/i386nop.inc
U    compiler/i386/i386op.inc
U    compiler/i386/i386tab.inc
U    compiler/i386/r386ot.inc
U    compiler/i386/r386ari.inc
U    compiler/i386/r386att.inc
U    compiler/i386/r386con.inc
U    compiler/i386/r386dwrf.inc
U    compiler/i386/r386int.inc
U    compiler/i386/r386iri.inc
U    compiler/i386/r386nasm.inc
U    compiler/i386/r386nor.inc
U    compiler/i386/r386nri.inc
U    compiler/i386/r386num.inc
U    compiler/i386/r386rni.inc
U    compiler/i386/r386sri.inc
U    compiler/i386/r386stab.inc
U    compiler/i386/r386std.inc
U    compiler/i8086/i8086prop.inc
U    compiler/i8086/i8086att.inc
U    compiler/i8086/i8086atts.inc
U    compiler/i8086/i8086nop.inc
U    compiler/i8086/i8086tab.inc
U    compiler/i8086/r8086ot.inc
U    compiler/i8086/r8086att.inc
U    compiler/i8086/r8086iri.inc
U    compiler/i8086/r8086nri.inc
U    compiler/i8086/r8086sri.inc
U    compiler/x86/agx86int.pas
U    compiler/x86/rax86int.pas
U    compiler/x86/aasmcpu.pas
U    compiler/x86/rax86.pas
U    compiler/x86/x86ins.dat
U    compiler/x86/agx86att.pas
U    compiler/x86/cpubase.pas
 U   packages/rtl-objpas/src/inc/rtti.pp
 U   packages/rtl-objpas/tests/tests.rtti.pas
 U   rtl
U    compiler/x86_64/x8664att.inc
U    compiler/x86_64/x8664tab.inc
U    compiler/x86_64/r8664con.inc
U    compiler/x86_64/r8664nasm.inc
U    compiler/x86_64/r8664sri.inc
U    compiler/aasmtai.pas
U    compiler/scanner.pas
U    tests/utils/avx/readme.txt
U    compiler/x86_64/x8664ats.inc
U    compiler/x86_64/x8664op.inc
U    compiler/x86_64/r8664att.inc
U    compiler/x86_64/r8664iri.inc
U    compiler/x86_64/r8664rni.inc
U    compiler/pp.lpi
U    compiler/msgtxt.inc
U    compiler/ppcx64.lpi
U    compiler/x86_64/x8664pro.inc
U    compiler/x86_64/x8664nop.inc
U    compiler/x86_64/r8664ari.inc
U    compiler/x86_64/r8664int.inc
U    compiler/x86_64/r8664num.inc
U    compiler/x86_64/r8664std.inc
U    compiler/msgidx.inc
U    compiler/utils/mkx86ins.pp
U    compiler/x86/x86reg.dat
D    compiler/x86/cx86innr.inc
U    compiler/x86_64/x8664int.inc
U    compiler/x86_64/r8664ot.inc
U    compiler/x86_64/r8664dwrf.inc
U    compiler/x86_64/r8664nor.inc
U    compiler/x86_64/r8664stab.inc
U    compiler/msg/errore.msg
U    compiler/utils/mkx86reg.pp
U    tests/utils/avx/asmtestgenerator.pas
U    tests/utils/avx/options.pas
U    tests/utils/avx/avxtestgenerator.pp
U    tests/test/units/character/tissurrogatepair2.pp
U    tests/test/units/character/tissurrogatepair.pp
U    tests/utils/avx/avxopcodes.pas
 U   .
-- Aufzeichnung der Informationen für Zusammenführung zwischen Projektarchiv-URLs in ».«:
 U   .
 U   packages/rtl-objpas/src/inc/rtti.pp
 U   packages/rtl-objpas/tests/tests.rtti.pas
 U   rtl

git-svn-id: trunk@42654 -
2019-08-11 17:29:30 +00:00
florian
746bfced25 Synchronized with trunk, part 1 (only make cycle tested, make all is broken, avx-512 support not yet tested
git-svn-id: branches/tg74/avx512@42642 -
2019-08-10 13:53:20 +00:00
nickysn
697f2fcf75 * prettify the "Use of -offset(%esp), access may cause a crash or value may be
lost" warning by showing the exact register used (esp or rsp) and using the
  asm syntax (Intel or AT&T) used originally in the code

git-svn-id: trunk@42211 -
2019-06-10 16:19:06 +00:00
nickysn
ce8ec3ab5d + introduced the asmmodes_x86_intel constant set
git-svn-id: trunk@42209 -
2019-06-10 15:44:19 +00:00
nickysn
4f2ab3fb11 * prettify the "Use of -offset(%ebp) is not recommended for local variable
access" warning by showing the exact register used (bp, ebp or rbp) and using
  the original asm syntax

git-svn-id: trunk@42208 -
2019-06-10 15:26:46 +00:00
nickysn
1e07606cbf * prettify the "Use of +offset(%ebp) is not compatible with regcall convention"
and "Use of +offset(%ebp) for parameters invalid here" warning messages by
  showing the exact register used (bp, ebp or rbp) and using the original asm
  syntax (Intel: [EBP+offset]; AT&T: +offset(%ebp) )

git-svn-id: trunk@42207 -
2019-06-10 15:08:46 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would
be introduced by the next commit

git-svn-id: trunk@42046 -
2019-05-12 14:29:03 +00:00
tg74
60a75a2277 delete testcode
git-svn-id: branches/tg74/avx512@39936 -
2018-10-15 10:46:41 +00:00
tg74
4265f4d6a5 avx512 broadcast for special opcodes vfpclass.., vcvt...
git-svn-id: branches/tg74/avx512@39768 -
2018-09-19 06:25:42 +00:00
tg74
15cc00164a bugfix avx512 - process operand-extention e.g. {SAE} correctly
git-svn-id: branches/tg74/avx512@39653 -
2018-08-20 13:30:17 +00:00
tg74
d6bd114b74 bugfix OS32
git-svn-id: branches/tg74/avx512@39649 -
2018-08-19 16:37:20 +00:00
tg74
2b1da37d66 new avx512 instructions and bugfixes avx512
git-svn-id: branches/tg74/avx512@39636 -
2018-08-19 10:18:32 +00:00
tg74
867d145e50 support vector operand bcst,{sae},{er} + k-register
git-svn-id: branches/tg74/avx512@39457 -
2018-07-16 17:06:57 +00:00
tg74
4dc5442fa5 support vector operand writemask,zeroflag
git-svn-id: branches/tg74/avx512@39359 -
2018-07-02 20:20:03 +00:00
tg74
31e4d4ef5e AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
git-svn-id: branches/tg74/avx512@39196 -
2018-06-08 06:53:35 +00:00
nickysn
2cee948b72 + support segment overrides in inline asm references to local variables or parameters on x86
git-svn-id: trunk@38392 -
2018-03-01 17:59:57 +00:00
florian
fc6c0e8ef4 + AndShlToShl optimization
* moved topsize2memsize to cpubase

git-svn-id: trunk@38343 -
2018-02-25 15:34:12 +00:00
florian
31f78ea2b6 + implementation of the vectorcall calling convention by J. Gareth Moreton
+ tests

git-svn-id: trunk@38206 -
2018-02-11 17:50:37 +00:00
nickysn
ae92973196 + added support for the retw, retnw, retfw, retd, retnd, retfd, retq, retnq and
retfq x86 instructions. These are variants of the ret instruction with the
  return offset size set explicitly, e.g. retfw is a 16-bit far ret (i.e. pops
  a 16-bit offset and a 16-bit segment), retfd is a 32-bit far ret (pops a
  32-bit offset, followed by a 16-bit segment), etc.

git-svn-id: trunk@37571 -
2017-11-10 16:53:29 +00:00
nickysn
e58bad8eef + check for the 'pop cs' instruction in the x86 inline assembler and print a
warning (on the i8086 target) or an error (on i386 and x86_64) when this
  instruction is used (because it only works on 8086 and 8088 CPUs)

git-svn-id: trunk@37514 -
2017-10-24 15:07:20 +00:00
nickysn
0d1f7910d7 + also apply optimize_ref() on references of inline asm instructions
git-svn-id: trunk@37512 -
2017-10-23 22:28:08 +00:00
nickysn
d96558cd64 * fixed bug in assembling some 32-bit instructions on the i8086 target (e.g.
mov dword ptr [something], ebx)

git-svn-id: trunk@37430 -
2017-10-08 11:10:42 +00:00
florian
b1dff29cbf * removed unused units
git-svn-id: trunk@36165 -
2017-05-09 19:53:14 +00:00
sergei
2357ca1fe6 * Fixed size suffix generated for CVTSI2SS, CVTSI2SD, VCVTSI2SS, VCVTSI2SD instructions. Mantis #31550.
* tasm2.pp already detected this bug if run with -al option. Added a copy of tasm2.pp and configured it with -al, so it is run daily on all suitable machines.

git-svn-id: trunk@35626 -
2017-03-19 10:29:28 +00:00
florian
c4fe4ab1f5 * correctly handle push <imm> on 80186+
git-svn-id: trunk@35455 -
2017-02-19 19:15:16 +00:00
sergei
8173efff3e * x86 asm reader: Don't copy operand size to instruction size for MOVSS and VMOVSS, because it is different for source and destination. Fixes breakage caused by fixing memory size of those instructions (Mantis #29954 and Mantis #29957).
+ Tests are extended to check that both OPR_LOCAL and OPR_REF memory operands compile without warnings as source and destination, in both Intel and AT&T syntax.

git-svn-id: trunk@35081 -
2016-12-07 14:08:28 +00:00
Jonas Maebe
aa1be3276f - removed default value of _typ parameter of TAsmData.(Weak)RefAsmSymbol():
it was AT_NONE, which is invalid and should never be used
  * explicitly pass the correct value for all calls to those methods elsewhere
    in the compiler

git-svn-id: trunk@34250 -
2016-08-05 07:09:16 +00:00
florian
8d5cc3dfa4 * (extended and modified) patch by Emelyanov Roman to add suport of RDRAND, RDSEED and TSX instructions set, resolves issue #29893.
In comparison with the original patch, support for a i386 has been added as well as a test program. 
  Further, a small issue with xbegin has been fixed

git-svn-id: trunk@33375 -
2016-03-28 19:08:13 +00:00
nickysn
be83ae47b9 + support NEC V20/V30's REPC/REPNC prefixes in the assembler reader
git-svn-id: trunk@33320 -
2016-03-24 14:25:32 +00:00
nickysn
a79676bd1c * fixed assembly of the NEC V20/V30 BRKEM instruction
git-svn-id: trunk@33319 -
2016-03-24 13:38:05 +00:00
nickysn
21c9712ea2 * allow 32-bit operand sizes in the i8086 version of Tx86Operand.SetSize, so
32-bit operands can work properly in i8086's inline asm. Fixes mantis #29188.

git-svn-id: trunk@32866 -
2016-01-06 18:06:34 +00:00
nickysn
3b80ca4376 + implemented the 'SEG @CODE' inline assembler directive for i8086
git-svn-id: trunk@32281 -
2015-11-10 18:02:10 +00:00
nickysn
995ca4fb12 + implemented the 'SEG @DATA' inline assembler directive for i8086
git-svn-id: trunk@32280 -
2015-11-10 17:26:21 +00:00
nickysn
43dabca8ab * moved the handling of the @Code and @Data inline assembler symbols to new methods Tx86operand.SetupCode and .SetupData
git-svn-id: trunk@32279 -
2015-11-10 14:04:40 +00:00
nickysn
910003848c * fixed code generation of indirect far calls and jumps on the i8086 from the
inline assembler

git-svn-id: trunk@31946 -
2015-10-05 02:19:32 +00:00
nickysn
e9c790f4eb + support 'SEG' in the i8086 inline assembler
git-svn-id: trunk@31428 -
2015-08-26 15:57:44 +00:00
nickysn
5c8965fea5 * in the inline asm reader, treat [var] reference as "word" instead of "dword"
when "var" is of dword size. This fixes spurious generation of a $66 prefix
  and makes the code consistent with what Tx86Operand.SetSize does (and what is
  then used for checking the operand sizes of all operands of the instruction in
  Tx86Instruction.CheckOperandSizes).

git-svn-id: trunk@30629 -
2015-04-17 19:58:06 +00:00