C compiler/i386/i386nop.inc
U compiler/i386/i386tab.inc
U compiler/i386/i386atts.inc
U compiler/i386/i386att.inc
C compiler/i8086/i8086nop.inc
U compiler/i8086/i8086tab.inc
U compiler/i8086/i8086atts.inc
U compiler/i8086/i8086att.inc
U compiler/x86/x86ins.dat
C compiler/x86/rax86.pas
U compiler/x86/aasmcpu.pas
U compiler/x86/cpubase.pas
U compiler/x86/agx86att.pas
U compiler/x86/itcpugas.pas
U compiler/x86/rax86att.pas
C compiler/x86_64/x8664nop.inc
U compiler/x86_64/x8664tab.inc
U compiler/x86_64/x8664ats.inc
U compiler/x86_64/x8664att.inc
U compiler/utils/mkx86ins.pp
U tests/utils/avx/asmtestgenerator.pas
U tests/utils/avx/avxopcodes.pas
-- Aufzeichnung der Informationen für Zusammenführung von r47033 bis r47401 in ».«:
U .
Konfliktübersicht:
Textkonflikte: 4
Konfliktübersicht:
Textkonflikte: 4
git-svn-id: trunk@47402 -
o added AArch64 regset parsing support in assembler reader, means that "{"
no longer starts comments there (like in the ARM assembler reader)
o added AArch64 indexed SIMD register support and removed old cg hacks
that worked around its absence
git-svn-id: trunk@47116 -
o they are implemented as a new metadata register class, whereby the
subregister indicates the metadata type (currently always a string)
and the superregister is an index in the metadata array (which
contains the strings). LLVM metadata can only be passed as parameters
to intrinsics in bitcode, so moves of metadata into other registers
triggers internal errors and when moving them into parameters, we
replace the parameter's register with the metadata register (and look
up the corresponding string when writing out the bitcode)
git-svn-id: trunk@43816 -
+ AArch64: support for vX.8b/vX.16b register names
+ support for more than 256 registers in the register dat files
- removed totherregisterset
+ AArch64: use vmov to load immediates if possible
+ AArch64: use eor to clear mm registers
git-svn-id: trunk@42917 -
U compiler/i8086/r8086int.inc
U compiler/i8086/r8086nor.inc
U compiler/i8086/r8086rni.inc
U compiler/i8086/r8086std.inc
U compiler/i386/i386prop.inc
U compiler/i386/i386att.inc
U compiler/i386/i386atts.inc
U compiler/i386/i386int.inc
U compiler/i8086/i8086int.inc
U compiler/i8086/i8086op.inc
U compiler/i8086/r8086dwrf.inc
U compiler/i8086/r8086ari.inc
U compiler/i8086/r8086con.inc
U compiler/i8086/r8086nasm.inc
U compiler/i8086/r8086num.inc
U compiler/i8086/r8086stab.inc
U compiler/i386/i386nop.inc
U compiler/i386/i386op.inc
U compiler/i386/i386tab.inc
U compiler/i386/r386ot.inc
U compiler/i386/r386ari.inc
U compiler/i386/r386att.inc
U compiler/i386/r386con.inc
U compiler/i386/r386dwrf.inc
U compiler/i386/r386int.inc
U compiler/i386/r386iri.inc
U compiler/i386/r386nasm.inc
U compiler/i386/r386nor.inc
U compiler/i386/r386nri.inc
U compiler/i386/r386num.inc
U compiler/i386/r386rni.inc
U compiler/i386/r386sri.inc
U compiler/i386/r386stab.inc
U compiler/i386/r386std.inc
U compiler/i8086/i8086prop.inc
U compiler/i8086/i8086att.inc
U compiler/i8086/i8086atts.inc
U compiler/i8086/i8086nop.inc
U compiler/i8086/i8086tab.inc
U compiler/i8086/r8086ot.inc
U compiler/i8086/r8086att.inc
U compiler/i8086/r8086iri.inc
U compiler/i8086/r8086nri.inc
U compiler/i8086/r8086sri.inc
U compiler/x86/agx86int.pas
U compiler/x86/rax86int.pas
U compiler/x86/aasmcpu.pas
U compiler/x86/rax86.pas
U compiler/x86/x86ins.dat
U compiler/x86/agx86att.pas
U compiler/x86/cpubase.pas
U packages/rtl-objpas/src/inc/rtti.pp
U packages/rtl-objpas/tests/tests.rtti.pas
U rtl
U compiler/x86_64/x8664att.inc
U compiler/x86_64/x8664tab.inc
U compiler/x86_64/r8664con.inc
U compiler/x86_64/r8664nasm.inc
U compiler/x86_64/r8664sri.inc
U compiler/aasmtai.pas
U compiler/scanner.pas
U tests/utils/avx/readme.txt
U compiler/x86_64/x8664ats.inc
U compiler/x86_64/x8664op.inc
U compiler/x86_64/r8664att.inc
U compiler/x86_64/r8664iri.inc
U compiler/x86_64/r8664rni.inc
U compiler/pp.lpi
U compiler/msgtxt.inc
U compiler/ppcx64.lpi
U compiler/x86_64/x8664pro.inc
U compiler/x86_64/x8664nop.inc
U compiler/x86_64/r8664ari.inc
U compiler/x86_64/r8664int.inc
U compiler/x86_64/r8664num.inc
U compiler/x86_64/r8664std.inc
U compiler/msgidx.inc
U compiler/utils/mkx86ins.pp
U compiler/x86/x86reg.dat
D compiler/x86/cx86innr.inc
U compiler/x86_64/x8664int.inc
U compiler/x86_64/r8664ot.inc
U compiler/x86_64/r8664dwrf.inc
U compiler/x86_64/r8664nor.inc
U compiler/x86_64/r8664stab.inc
U compiler/msg/errore.msg
U compiler/utils/mkx86reg.pp
U tests/utils/avx/asmtestgenerator.pas
U tests/utils/avx/options.pas
U tests/utils/avx/avxtestgenerator.pp
U tests/test/units/character/tissurrogatepair2.pp
U tests/test/units/character/tissurrogatepair.pp
U tests/utils/avx/avxopcodes.pas
U .
-- Aufzeichnung der Informationen für Zusammenführung zwischen Projektarchiv-URLs in ».«:
U .
U packages/rtl-objpas/src/inc/rtti.pp
U packages/rtl-objpas/tests/tests.rtti.pas
U rtl
git-svn-id: trunk@42654 -
* when generating x86 code for parameterized string instructions with the
internal object writer, don't rely on the destination operand being [(r/e)di]
when determining the segment prefix, because when using intel syntax, source
and destination can be anything (only the operand size, the address size and
the source segment is taken into account)
git-svn-id: trunk@37452 -
is_x86_parameterless_string_instruction_op and
is_x86_parameterized_string_instruction_op by removing 'instruction' from
their names
git-svn-id: trunk@37451 -
get_x86_string_op_size
* refactored the AT&T inline asm handling of x86 parameterized string ops, so it
uses the new helper functions
git-svn-id: trunk@37449 -
from cpubase unit to a method in the tcg class. The reason for doing that is
that this is now a standard part of the 16-bit and 8-bit code generators and
moving to the tcg class allows doing extra checks (not done yet, but for
example, in the future, we can keep track of whether there was an extra
register allocated with getintregister and halt with an internalerror in case
GetNextReg() is called for registers, which weren't allocated as a part of a
sequence, therefore catching a certain class of 8-bit and 16-bit code
generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
anything. It might be added to the tcg class, in case it's ever needed, but
for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.
git-svn-id: trunk@37180 -
list, because these instructions already have a built in FWAIT prefix even
when targeting the 287/387+ both with the internal asm writer and with the
NASM back end.
git-svn-id: trunk@26178 -