Commit Graph

132 Commits

Author SHA1 Message Date
florian
b713c7380b * implemented UseAVX512 properly
+ make use of VREDUCE* for frac(...) if AVX512QD is a available

git-svn-id: trunk@47840 -
2020-12-23 17:25:09 +00:00
florian
fc960879de -- Zusammenführen von r47033 bis r47401 in ».«:
C    compiler/i386/i386nop.inc
U    compiler/i386/i386tab.inc
U    compiler/i386/i386atts.inc
U    compiler/i386/i386att.inc
C    compiler/i8086/i8086nop.inc
U    compiler/i8086/i8086tab.inc
U    compiler/i8086/i8086atts.inc
U    compiler/i8086/i8086att.inc
U    compiler/x86/x86ins.dat
C    compiler/x86/rax86.pas
U    compiler/x86/aasmcpu.pas
U    compiler/x86/cpubase.pas
U    compiler/x86/agx86att.pas
U    compiler/x86/itcpugas.pas
U    compiler/x86/rax86att.pas
C    compiler/x86_64/x8664nop.inc
U    compiler/x86_64/x8664tab.inc
U    compiler/x86_64/x8664ats.inc
U    compiler/x86_64/x8664att.inc
U    compiler/utils/mkx86ins.pp
U    tests/utils/avx/asmtestgenerator.pas
U    tests/utils/avx/avxopcodes.pas
-- Aufzeichnung der Informationen für Zusammenführung von r47033 bis r47401 in ».«:
 U   .
Konfliktübersicht:
  Textkonflikte: 4
Konfliktübersicht:
  Textkonflikte: 4

git-svn-id: trunk@47402 -
2020-11-12 20:31:29 +00:00
florian
47066f0ce7 * moved UseAVX from cgx86 to cpubase
+ UseAVX512

git-svn-id: trunk@47346 -
2020-11-08 19:39:18 +00:00
tg74
3f05580f21 clean up
git-svn-id: branches/tg74/avx512-0037785@47281 -
2020-11-02 05:22:22 +00:00
Jonas Maebe
9376f5a43a * AArch64: added SIMD instructions (only plain ARMv8-A for now)
o added AArch64 regset parsing support in assembler reader, means that "{"
     no longer starts comments there (like in the ARM assembler reader)
   o added AArch64 indexed SIMD register support and removed old cg hacks
     that worked around its absence

git-svn-id: trunk@47116 -
2020-10-15 20:29:36 +00:00
tg74
c65b042856 bugfix opcodes cvt.., vcvt.. memory operands and typesize
git-svn-id: branches/tg74/avx512-0037785@47113 -
2020-10-15 08:22:29 +00:00
florian
637976e83f * patch by Marģers to unify internal error numbers, resolves #37888
git-svn-id: trunk@47103 -
2020-10-13 19:59:01 +00:00
florian
f3a660212d * avx-512 has 32 mm registers
git-svn-id: trunk@47072 -
2020-10-10 13:23:34 +00:00
florian
b7c6e01b03 * cleaning up tcgsize: it makes no sense to declare every combination and type
the different vector types must be either handled in the high level cg or
    by using the shuffle parameter

git-svn-id: trunk@43860 -
2020-01-04 21:54:53 +00:00
Jonas Maebe
9bd33f7a45 + support for LLVM metadata constant string parameters
o they are implemented as a new metadata register class, whereby the
     subregister indicates the metadata type (currently always a string)
     and the superregister is an index in the metadata array (which
     contains the strings). LLVM metadata can only be passed as parameters
     to intrinsics in bitcode, so moves of metadata into other registers
     triggers internal errors and when moving them into parameters, we
     replace the parameter's register with the metadata register (and look
     up the corresponding string when writing out the bitcode)

git-svn-id: trunk@43816 -
2019-12-30 15:04:57 +00:00
florian
e1e8986462 * patch by J. Gareth Moreton, issue #36271, part 3: support for the other architectures
git-svn-id: trunk@43441 -
2019-11-10 16:11:40 +00:00
florian
69786ffe73 somehow committing went wrong, second part of last commit:
+ AArch64: support for vX.8b/vX.16b register names
+ support for more than 256 registers in the register dat files
- removed totherregisterset
+ AArch64: use vmov to load immediates if possible
+ AArch64: use eor to clear mm registers

git-svn-id: trunk@42917 -
2019-09-03 21:07:33 +00:00
florian
ba203c0564 + x86 makes use of fpu_capabilities
* moved CPUX86_HAS_AVXUNIT to FPUX86_HAS_AVXUNIT
+ mm register allocator can be initialized with 32 mm registers of AVX512

git-svn-id: trunk@42707 -
2019-08-16 11:35:03 +00:00
florian
7f8dc75604 -- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«:
U    compiler/i8086/r8086int.inc
U    compiler/i8086/r8086nor.inc
U    compiler/i8086/r8086rni.inc
U    compiler/i8086/r8086std.inc
U    compiler/i386/i386prop.inc
U    compiler/i386/i386att.inc
U    compiler/i386/i386atts.inc
U    compiler/i386/i386int.inc
U    compiler/i8086/i8086int.inc
U    compiler/i8086/i8086op.inc
U    compiler/i8086/r8086dwrf.inc
U    compiler/i8086/r8086ari.inc
U    compiler/i8086/r8086con.inc
U    compiler/i8086/r8086nasm.inc
U    compiler/i8086/r8086num.inc
U    compiler/i8086/r8086stab.inc
U    compiler/i386/i386nop.inc
U    compiler/i386/i386op.inc
U    compiler/i386/i386tab.inc
U    compiler/i386/r386ot.inc
U    compiler/i386/r386ari.inc
U    compiler/i386/r386att.inc
U    compiler/i386/r386con.inc
U    compiler/i386/r386dwrf.inc
U    compiler/i386/r386int.inc
U    compiler/i386/r386iri.inc
U    compiler/i386/r386nasm.inc
U    compiler/i386/r386nor.inc
U    compiler/i386/r386nri.inc
U    compiler/i386/r386num.inc
U    compiler/i386/r386rni.inc
U    compiler/i386/r386sri.inc
U    compiler/i386/r386stab.inc
U    compiler/i386/r386std.inc
U    compiler/i8086/i8086prop.inc
U    compiler/i8086/i8086att.inc
U    compiler/i8086/i8086atts.inc
U    compiler/i8086/i8086nop.inc
U    compiler/i8086/i8086tab.inc
U    compiler/i8086/r8086ot.inc
U    compiler/i8086/r8086att.inc
U    compiler/i8086/r8086iri.inc
U    compiler/i8086/r8086nri.inc
U    compiler/i8086/r8086sri.inc
U    compiler/x86/agx86int.pas
U    compiler/x86/rax86int.pas
U    compiler/x86/aasmcpu.pas
U    compiler/x86/rax86.pas
U    compiler/x86/x86ins.dat
U    compiler/x86/agx86att.pas
U    compiler/x86/cpubase.pas
 U   packages/rtl-objpas/src/inc/rtti.pp
 U   packages/rtl-objpas/tests/tests.rtti.pas
 U   rtl
U    compiler/x86_64/x8664att.inc
U    compiler/x86_64/x8664tab.inc
U    compiler/x86_64/r8664con.inc
U    compiler/x86_64/r8664nasm.inc
U    compiler/x86_64/r8664sri.inc
U    compiler/aasmtai.pas
U    compiler/scanner.pas
U    tests/utils/avx/readme.txt
U    compiler/x86_64/x8664ats.inc
U    compiler/x86_64/x8664op.inc
U    compiler/x86_64/r8664att.inc
U    compiler/x86_64/r8664iri.inc
U    compiler/x86_64/r8664rni.inc
U    compiler/pp.lpi
U    compiler/msgtxt.inc
U    compiler/ppcx64.lpi
U    compiler/x86_64/x8664pro.inc
U    compiler/x86_64/x8664nop.inc
U    compiler/x86_64/r8664ari.inc
U    compiler/x86_64/r8664int.inc
U    compiler/x86_64/r8664num.inc
U    compiler/x86_64/r8664std.inc
U    compiler/msgidx.inc
U    compiler/utils/mkx86ins.pp
U    compiler/x86/x86reg.dat
D    compiler/x86/cx86innr.inc
U    compiler/x86_64/x8664int.inc
U    compiler/x86_64/r8664ot.inc
U    compiler/x86_64/r8664dwrf.inc
U    compiler/x86_64/r8664nor.inc
U    compiler/x86_64/r8664stab.inc
U    compiler/msg/errore.msg
U    compiler/utils/mkx86reg.pp
U    tests/utils/avx/asmtestgenerator.pas
U    tests/utils/avx/options.pas
U    tests/utils/avx/avxtestgenerator.pp
U    tests/test/units/character/tissurrogatepair2.pp
U    tests/test/units/character/tissurrogatepair.pp
U    tests/utils/avx/avxopcodes.pas
 U   .
-- Aufzeichnung der Informationen für Zusammenführung zwischen Projektarchiv-URLs in ».«:
 U   .
 U   packages/rtl-objpas/src/inc/rtti.pp
 U   packages/rtl-objpas/tests/tests.rtti.pas
 U   rtl

git-svn-id: trunk@42654 -
2019-08-11 17:29:30 +00:00
florian
f883dd6dbb Synchronized with trunk, part 2 (make all works, avx-512 support not yet tested, no regression testing yet)
git-svn-id: branches/tg74/avx512@42643 -
2019-08-10 19:38:35 +00:00
florian
746bfced25 Synchronized with trunk, part 1 (only make cycle tested, make all is broken, avx-512 support not yet tested
git-svn-id: branches/tg74/avx512@42642 -
2019-08-10 13:53:20 +00:00
Jonas Maebe
1b6425176b * synchronised with trunk till r42049
git-svn-id: branches/debug_eh@42050 -
2019-05-12 18:44:05 +00:00
Jonas Maebe
281b3ad276 * fix case completeness and unreachable code warnings in compiler that would
be introduced by the next commit

git-svn-id: trunk@42046 -
2019-05-12 14:29:03 +00:00
Jonas Maebe
b3a8543a56 * synchronised with trunk till r40942
git-svn-id: branches/debug_eh@40943 -
2019-01-20 17:37:07 +00:00
florian
b223d1c304 * modified patch by Gareth Moreton to make ie unique, resolves #34849
git-svn-id: trunk@40849 -
2019-01-12 14:44:54 +00:00
Jonas Maebe
4d262e0eca * fixed return value of fpc_eh_return_data_regno(1) on x86-64
git-svn-id: branches/debug_eh@40336 -
2018-11-17 09:40:37 +00:00
Jonas Maebe
8555ec1438 + fpc_eh_return_data_regno() intrinsic to get the return register numbers
for the Dwarf EH exception handler result

git-svn-id: branches/debug_eh@40070 -
2018-10-28 18:16:38 +00:00
pierre
92acd38f40 Fix for bug report #34380
git-svn-id: trunk@39986 -
2018-10-18 20:21:54 +00:00
tg74
867d145e50 support vector operand bcst,{sae},{er} + k-register
git-svn-id: branches/tg74/avx512@39457 -
2018-07-16 17:06:57 +00:00
tg74
31e4d4ef5e AVX512 support for MMRegister xmm16..31 and ymm16..31, zmm0..31, vpaddsb support AVX512
git-svn-id: branches/tg74/avx512@39196 -
2018-06-08 06:53:35 +00:00
florian
fc6c0e8ef4 + AndShlToShl optimization
* moved topsize2memsize to cpubase

git-svn-id: trunk@38343 -
2018-02-25 15:34:12 +00:00
florian
31f78ea2b6 + implementation of the vectorcall calling convention by J. Gareth Moreton
+ tests

git-svn-id: trunk@38206 -
2018-02-11 17:50:37 +00:00
nickysn
baf492c7a5 + another helper function: x86_parameterized_string_op_param_count
* when generating x86 code for parameterized string instructions with the
  internal object writer, don't rely on the destination operand being [(r/e)di]
  when determining the segment prefix, because when using intel syntax, source
  and destination can be anything (only the operand size, the address size and
  the source segment is taken into account)

git-svn-id: trunk@37452 -
2017-10-12 16:07:15 +00:00
nickysn
4c75b15afe * shortened the names of the is_x86_string_instruction_op,
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op by removing 'instruction' from
  their names

git-svn-id: trunk@37451 -
2017-10-12 15:20:22 +00:00
nickysn
e3ca2a3043 + added helper functions get_x86_string_op_si_param and get_x86_string_op_di_param
* use get_x86_string_op_si_param in the nasm writer

git-svn-id: trunk@37450 -
2017-10-12 15:12:40 +00:00
nickysn
5a5cd65559 + added helper functions x86_param2paramless_string_op and
get_x86_string_op_size
* refactored the AT&T inline asm handling of x86 parameterized string ops, so it
  uses the new helper functions

git-svn-id: trunk@37449 -
2017-10-12 14:25:32 +00:00
nickysn
98c4986b6d + added x86 helper functions is_x86_string_instruction_op,
is_x86_parameterless_string_instruction_op and
  is_x86_parameterized_string_instruction_op

git-svn-id: trunk@37447 -
2017-10-12 13:18:38 +00:00
nickysn
ddba821561 * GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
from cpubase unit to a method in the tcg class. The reason for doing that is
  that this is now a standard part of the 16-bit and 8-bit code generators and
  moving to the tcg class allows doing extra checks (not done yet, but for
  example, in the future, we can keep track of whether there was an extra
  register allocated with getintregister and halt with an internalerror in case
  GetNextReg() is called for registers, which weren't allocated as a part of a
  sequence, therefore catching a certain class of 8-bit and 16-bit code
  generator bugs at compile time, instead of generating wrong code).
- removed GetLastReg() from avr's cpubase unit, because it isn't used for
  anything. It might be added to the tcg class, in case it's ever needed, but
  for now I've left it out.
* GetOffsetReg() and GetOffsetReg64() were also moved to the tcg unit.

git-svn-id: trunk@37180 -
2017-09-11 14:53:06 +00:00
nickysn
30c38a81a9 + also check register type (must be R_INTREGISTER) and subregister (must be
R_SUBW) in i8086's GetNextReg()

git-svn-id: trunk@37177 -
2017-09-11 13:25:32 +00:00
florian
b1dff29cbf * removed unused units
git-svn-id: trunk@36165 -
2017-05-09 19:53:14 +00:00
nickysn
8926adbab5 * fixed names, returned by std_regname for ymm registers
git-svn-id: trunk@35997 -
2017-04-28 13:46:57 +00:00
nickysn
c8487c4150 + added individual bits of the x86 flags register as subregisters
git-svn-id: trunk@35955 -
2017-04-26 13:52:52 +00:00
nickysn
5f66f5cebb + distinguish between x86 flags subregisters: flags, eflags and rflags
git-svn-id: trunk@35953 -
2017-04-25 16:10:43 +00:00
nickysn
52f41a8f67 * fixed i8086 regressions after r35082
git-svn-id: trunk@35317 -
2017-01-16 23:17:08 +00:00
florian
1e374df5b8 * correctly calculate the bit mask in thlcgobj.a_load_regconst_subsetreg_intern, resolves #31042
* convert immediates on x86 always to 32 (x86-64, i386) or 16 bit (i8086) signed values

git-svn-id: trunk@35082 -
2016-12-07 20:08:22 +00:00
florian
d0b2701693 * similiar fix for i386 as done in r34984 for x86-64
git-svn-id: trunk@35016 -
2016-11-29 20:41:33 +00:00
sergei
2861362780 * Reuse binary search routine from rgbase.pas to look up AT&T register names, removes need in regnumber_count_bsstart constant. Resolves #29471.
git-svn-id: trunk@33076 -
2016-02-09 16:48:32 +00:00
Jonas Maebe
9d4c8f68d4 * fixed first_fpu_immreg definition
git-svn-id: trunk@30427 -
2015-04-04 14:29:09 +00:00
sergei
07e90aaa24 + Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362.
git-svn-id: trunk@27581 -
2014-04-14 12:36:11 +00:00
nickysn
4763723c75 + support compact, large and huge memory models in x86/cpubase.segment_regs_equal()
git-svn-id: trunk@27392 -
2014-03-30 19:36:21 +00:00
nickysn
3555b76495 - rm FDISI,FENI,FSAVE,FSTCW,FSTENV and FSTSW from the requires_fwait_on_8087()
list, because these instructions already have a built in FWAIT prefix even
  when targeting the 287/387+ both with the internal asm writer and with the
  NASM back end.

git-svn-id: trunk@26178 -
2013-12-03 23:56:45 +00:00
nickysn
e9a4896565 - rm the 287/387+ FPU instructions from the requires_fwait_on_8087() list
git-svn-id: trunk@26176 -
2013-12-03 22:48:52 +00:00
nickysn
12b2f86e99 + added function requires_fwait_on_8087(), which checks whether a given
instruction needs adding a FWAIT prefix on the i8087.

git-svn-id: trunk@26106 -
2013-11-18 23:38:57 +00:00
florian
f132a804d6 + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics
git-svn-id: trunk@25909 -
2013-11-01 19:01:39 +00:00
nickysn
58b22adaf1 + added function cpubase.segment_regs_equal, which checks whether 2 segment regs are equal in the current memory model
git-svn-id: trunk@24949 -
2013-06-23 11:27:00 +00:00