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f570b6cb7b
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25610 Commits

Author SHA1 Message Date
florian
f570b6cb7b + more Aarch64 cpu capability flags added 2021-11-07 11:06:01 +01:00
florian
c1d43df4a1 + be able to add single cpu capabilites by the command line 
+ AArch64: SHA2 capability
 2021-11-06 23:32:56 +01:00
florian
716e8c8e89 * tcgsizep2size now supports all tcgsize values 2021-11-06 21:16:07 +01:00
Yuriy Sydorov
8e5c2467e2 * Fixed node coalescing with real registers. 2021-11-06 21:47:28 +02:00
florian
9423d5e390 + fp-armv8 fpu type added 2021-11-06 11:00:53 +01:00
florian
9feafc7bd7 + ARM: started on vfpv5 support 2021-11-05 23:05:38 +01:00
florian
44051b4af3 * corrected accidently made changs in 01a449c8, resolves #39424 2021-11-03 22:41:07 +01:00
florian
2240c69078 * improved heurisics when thread var addresses or float constants are put in registers 2021-11-03 22:28:48 +01:00
Florian Klämpfl
a47f153dae * avoid to create a stack frame on aarch64 if possible 2021-11-02 22:23:24 +01:00
florian
e0a78c2485 * tcgaarch64.g_concatcopy calls tcgaarch64.g_concatcopy_move only if the current subroutine has pi_do_call set 
* fixed copy loop in tcgaarch64.g_concatcopy if ldp/stp is used: fixed increment calculation and fixed tail length calculation
 2021-11-02 22:01:52 +01:00
Yuriy Sydorov
7e4753bebd * Typo fixed. 2021-11-02 20:36:30 +02:00
Yuriy Sydorov
5b32c81bef * Corrected setting of the flag. 2021-11-02 20:33:34 +02:00
Yuriy Sydorov
b78761efd3 * Removed obsolete OLDREGVARS ifdefs. 2021-11-02 17:08:08 +02:00
Yuriy Sydorov
d96600a02d * Removed unused and confusing tnode.parent and tnode.concattolist(). 2021-11-02 16:55:59 +02:00
Yuriy Sydorov
d0cc649428 * Write interference graphs to the unit output directory. 2021-11-02 16:46:09 +02:00
Yuriy Sydorov
e04df465ef * The label which is generated by traisenode is not a jump target. Mark 
this label as nf_internal, which means the label does not impact the
  code flow. This leads to a much better register allocation.
 2021-11-02 16:46:09 +02:00
Yuriy Sydorov
c4a1cdceae * Corrected calculation of spilling efficiency. 2021-11-02 16:46:08 +02:00
Yuriy Sydorov
c9d9d42f0e * Better coalescing with real registers. This improves setting of parameters 
in registers.
* Removed superfluous condition in trgobj.enable_moves().
* Fixed flags checking in trgobj.adjacent_ok().
* Added assembler comments about coalescing when DEBUG_SPILLCOALESCE is defined.
 2021-11-02 16:46:08 +02:00
Yuriy Sydorov
66b7ed45fd * Removed unused tlocation.registers[]. 2021-11-02 16:46:08 +02:00
florian
dcb1fcd9b8 + support $lgeacyifend directive, resolves #37676 2021-11-01 23:24:42 +01:00
Jonas Maebe
89d2775191 optcse: fix wrong typecast 2021-11-01 13:56:51 +01:00
florian
fcdbb31ec4 * AArch64: TCpuAsmOptimizer.RegLoadedWithNewValue: check if p.ops=0 2021-11-01 11:46:19 +01:00
Jonas Maebe
15865e7602 Record variant discriminators: check types 2021-10-31 21:13:35 +01:00
florian
4f77cbbac4 + keep addresses of thread vars in registers if possible and likely an advantage 2021-10-31 19:25:01 +01:00
florian
5a617cd108 + fold real constants c1,c2 for v+c1+c2 or c1+(c2+v) (+ being either + or *) as well if fastmath is enabled 2021-10-31 17:38:08 +01:00
J. Gareth "Curious Kit" Moreton
284317d877 Fixed OptPass2Lea not honouring symbols 2021-10-31 15:44:00 +00:00
J. Gareth "Curious Kit" Moreton
42eb06f5c6 Fixed some range check problems 2021-10-31 15:44:00 +00:00
J. Gareth "Curious Kit" Moreton
b58fdc3e58 Improved ADD and SUB optimisations for LEA instructions 2021-10-31 15:44:00 +00:00
florian
ff3acfb8cd * cleanup of 2.7.0 defines 2021-10-31 13:20:28 +01:00
florian
e657aa6431 + write code and data size for Mach-O files if possible 2021-10-31 11:57:32 +01:00
florian
fb7cdbefb3 + some opcodes added 2021-10-30 20:21:59 +02:00
florian
95ad8f1694 * correctly read the region label in $region directives, resolves #39395 2021-10-28 21:13:01 +02:00
Jonas Maebe
3263e12a3e iphonesim: use ios_simulator_version_min 
The linker expects ios_simulator_version_min rather than -iphoneos_version_min
when targeting the iOS simulator platform. Fixes compilation with Xcode 11
toolchains, which is more strict about this.
 2021-10-27 20:53:42 +02:00
Jonas Maebe
334cf9c19d iphonesim target: requires proper alignment 
Just like the native iOS targets
 2021-10-27 20:53:39 +02:00
florian
4b157a1498 + print full file path if -vb is passed even if no line number is known, resolves #39419 2021-10-26 21:37:28 +02:00
florian
10fcae34a9 * improved TX86AsmOptimizer.OptPass1MOVXX 2021-10-24 18:38:23 +02:00
florian
4610980f2e * TX86AsmOptimizer.OptPass1MOVXX takes care of volatility 2021-10-23 23:40:09 +02:00
Nikolay Nikolov
7f1050464a + added 'else' tracking for the if..end_if blocks 2021-10-23 11:56:25 +03:00
Nikolay Nikolov
7bef4d827d * keep track of the block stack, when resolving labels and check whether the 
blocks match (i.e. block..end_block, if..end_if, loop..end_loop, try..end_try)
 2021-10-23 11:25:44 +03:00
J. Gareth "Curious Kit" Moreton
342803532d Bug fix to MovMov2Mov 6 optimisation exposed by 4012c3dbd4 (and miscellaneous code refactors) 2021-10-22 22:39:46 +00:00
florian
d0fdda6da7 + TDFABuilder.redodfainfo 2021-10-22 22:39:39 +02:00
Nikolay Nikolov
12a2c56461 - removed thlcgwasm.incblock, .decblock and br_blocks, as branching is now done 
entirely with labels
 2021-10-22 17:42:29 +03:00
Nikolay Nikolov
3094f75690 * WebAssembly code generation for 'case' nodes changed to use labels 2021-10-22 17:31:04 +03:00
Nikolay Nikolov
6fe647ee3d * moved the default procedure CurrRaiseLabel to the end of the procedure, not 
at the exit label. This fixes problems when using units with finalization
  code that contain classes with class destructors in branchful WebAssembly
  exceptions mode.
 2021-10-22 13:54:55 +03:00
Nikolay Nikolov
470e77a572 + added sanity check when resolving labels to ensure we don't get any jumps with 
negative nesting depth
 2021-10-22 13:54:55 +03:00
Nikolay Nikolov
5a0956d805 * use WebAssembly asm labels for the raise branch instruction in branchful 
exceptions mode
 2021-10-22 13:54:55 +03:00
Karoly Balogh
e018264ad9 internalerror if the section we're about to keep has no exesection assigned 2021-10-20 14:37:27 +02:00
Nikolay Nikolov
4e3a6aa5a8 * match the label to the wider block, if it is adjacent to both the brevious 
and the next instruction
 2021-10-20 14:35:52 +03:00
Nikolay Nikolov
c96e203780 * moved the 'end_block' WebAssembly instruction before the 'exit' label right 
before the procedure finalization code. This fixes compilation errors in
  procedures with implicit finalization code (e.g. for ansistring local vars,
  etc).
 2021-10-20 14:35:52 +03:00
Nikolay Nikolov
bb30958665 + wrap block nodes with exit in a_block..a_end_block instructions. This fixes 
'exit' in inlined procedures on the WebAssembly target.
 2021-10-20 14:35:51 +03:00