fpc/compiler/sparc
2013-12-30 11:51:57 +00:00
..
aasmcpu.pas
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
cgcpu.pas * SPARC: fixed g_intf_wrapper for non-virtual methods once again, my initial assumption was not correct: a wrapper does not necessarily reference methods from the class that implements the interface, it may be methods from parent classes, which can be located arbitrarily far away in address space. 2013-12-30 11:51:57 +00:00
cpubase.pas * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 2013-12-27 06:45:49 +00:00
cpuelf.pas + Added codes of dynamic relocations to TElfTarget; since most targets use similar dynamic relocation model differing only in code values, this will allow to do majority of handling in the base class. 2012-12-16 09:36:34 +00:00
cpugas.pas * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. 2013-12-27 19:53:38 +00:00
cpuinfo.pas * removed spaces from sparc cpu name strings so they can be much easier used 2012-10-31 20:57:14 +00:00
cpunode.pas
cpupara.pas * SPARC: properly justify parameters on stack with size less than 4, fixes failure on tests/cg/tcalext5.pp 2013-12-28 09:23:10 +00:00
cpupi.pas * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. 2013-12-27 19:53:38 +00:00
cputarg.pas Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF 2012-08-23 12:59:45 +00:00
hlcgcpu.pas
itcpugas.pas
ncpuadd.pas * SPARC, tsparcaddnode.second_cmp64bit: don't copy LOC_CREGISTER locations, and handle comparison with constants without loading them into register (if possible). 2013-12-29 10:12:19 +00:00
ncpucall.pas compiler: change ret_in_param to accept tabstractprocdef instead of tproccalloption to allow check more options (required for record constructor implementation) 2013-01-16 01:14:23 +00:00
ncpucnv.pas * SPARC: convert from int64/qword to float using genmath helpers. Removes dependency on softfloat code. 2013-12-22 14:02:34 +00:00
ncpuinln.pas
ncpumat.pas * SPARC: removed 32 bit shift code, and adjusted 64-bit shifts to take advantage of 3-address instructions (a port of r26142 for MIPS) 2013-12-22 14:09:24 +00:00
ncpuset.pas * Proper fix for SPARC cycling with -dCHECK_PIC, pi_needs_got additionally must be set in following cases: 2012-12-18 17:56:56 +00:00
opcode.inc + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00
racpu.pas
racpugas.pas * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 2013-12-27 06:45:49 +00:00
rgcpu.pas
rspcon.inc
rspdwrf.inc
rspnor.inc
rspnum.inc
rsprni.inc
rspsri.inc
rspstab.inc
rspstd.inc
rspsup.inc
spreg.dat
strinst.inc + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00