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aasmcpu.pas
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aoptcpu.pas
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aoptcpub.pas
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aoptcpud.pas
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cgcpu.pas
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* SPARC: fixed g_intf_wrapper for non-virtual methods once again, my initial assumption was not correct: a wrapper does not necessarily reference methods from the class that implements the interface, it may be methods from parent classes, which can be located arbitrarily far away in address space.
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2013-12-30 11:51:57 +00:00 |
cpubase.pas
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* SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches.
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2013-12-27 06:45:49 +00:00 |
cpuelf.pas
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+ Added codes of dynamic relocations to TElfTarget; since most targets use similar dynamic relocation model differing only in code values, this will allow to do majority of handling in the base class.
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2012-12-16 09:36:34 +00:00 |
cpugas.pas
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* SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code.
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2013-12-27 19:53:38 +00:00 |
cpuinfo.pas
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* removed spaces from sparc cpu name strings so they can be much easier used
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2012-10-31 20:57:14 +00:00 |
cpunode.pas
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cpupara.pas
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* SPARC: properly justify parameters on stack with size less than 4, fixes failure on tests/cg/tcalext5.pp
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2013-12-28 09:23:10 +00:00 |
cpupi.pas
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* SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code.
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2013-12-27 19:53:38 +00:00 |
cputarg.pas
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Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF
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2012-08-23 12:59:45 +00:00 |
hlcgcpu.pas
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itcpugas.pas
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ncpuadd.pas
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* SPARC, tsparcaddnode.second_cmp64bit: don't copy LOC_CREGISTER locations, and handle comparison with constants without loading them into register (if possible).
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2013-12-29 10:12:19 +00:00 |
ncpucall.pas
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compiler: change ret_in_param to accept tabstractprocdef instead of tproccalloption to allow check more options (required for record constructor implementation)
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2013-01-16 01:14:23 +00:00 |
ncpucnv.pas
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* SPARC: convert from int64/qword to float using genmath helpers. Removes dependency on softfloat code.
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2013-12-22 14:02:34 +00:00 |
ncpuinln.pas
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ncpumat.pas
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* SPARC: removed 32 bit shift code, and adjusted 64-bit shifts to take advantage of 3-address instructions (a port of r26142 for MIPS)
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2013-12-22 14:09:24 +00:00 |
ncpuset.pas
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* Proper fix for SPARC cycling with -dCHECK_PIC, pi_needs_got additionally must be set in following cases:
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2012-12-18 17:56:56 +00:00 |
opcode.inc
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+ SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently.
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2013-12-21 16:27:24 +00:00 |
racpu.pas
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racpugas.pas
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* SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches.
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2013-12-27 06:45:49 +00:00 |
rgcpu.pas
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rspcon.inc
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rspdwrf.inc
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rspnor.inc
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rspnum.inc
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rsprni.inc
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rspsri.inc
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rspstab.inc
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rspstd.inc
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rspsup.inc
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spreg.dat
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strinst.inc
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+ SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently.
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2013-12-21 16:27:24 +00:00 |