| .. |
|
aoptcpu.pas
|
+ added x86 instruction flag Ch_RFLAGScc, indicating instructions that read
|
2017-04-22 22:07:05 +00:00 |
|
aoptcpub.pas
|
|
|
|
aoptcpud.pas
|
|
|
|
cgcpu.pas
|
* use TEST CL,32 instead of TEST ECX,32 in the beginning of a 64-bit shl/shr
|
2017-04-19 21:30:31 +00:00 |
|
cpubase.inc
|
|
|
|
cpuelf.pas
|
|
|
|
cpuinfo.pas
|
|
|
|
cpunode.pas
|
|
|
|
cpupara.pas
|
* use pocalls_cdecl and cstylearrayofconst more consistently instead of
|
2017-02-25 11:46:35 +00:00 |
|
cpupi.pas
|
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
|
2016-12-16 22:41:21 +00:00 |
|
cputarg.pas
|
|
|
|
hlcgcpu.pas
|
+ added volatility information to all memory references
|
2016-11-27 18:17:37 +00:00 |
|
i386att.inc
|
+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933
|
2016-11-18 20:19:39 +00:00 |
|
i386atts.inc
|
* x86 AT&T reader and writer: cleaned up usage of attsufMM suffix:
|
2016-11-21 02:07:13 +00:00 |
|
i386int.inc
|
+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933
|
2016-11-18 20:19:39 +00:00 |
|
i386nop.inc
|
* Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code.
|
2016-11-21 13:59:44 +00:00 |
|
i386op.inc
|
+ support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933
|
2016-11-18 20:19:39 +00:00 |
|
i386prop.inc
|
* proper register change info for the movs,cmps and scas x86 string instructions
|
2017-04-23 21:30:25 +00:00 |
|
i386tab.inc
|
* Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code.
|
2016-11-21 13:59:44 +00:00 |
|
n386add.pas
|
+ added volatility information to all memory references
|
2016-11-27 18:17:37 +00:00 |
|
n386cal.pas
|
syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed
|
2016-12-02 09:29:09 +00:00 |
|
n386flw.pas
|
+ added volatility information to all memory references
|
2016-11-27 18:17:37 +00:00 |
|
n386inl.pas
|
|
|
|
n386ld.pas
|
|
|
|
n386mat.pas
|
* use TEST CL,32 instead of TEST ECX,32 in the beginning of a 64-bit shl/shr
|
2017-04-19 21:30:31 +00:00 |
|
n386mem.pas
|
|
|
|
n386set.pas
|
|
|
|
r386ari.inc
|
|
|
|
r386att.inc
|
|
|
|
r386con.inc
|
|
|
|
r386dwrf.inc
|
|
|
|
r386int.inc
|
|
|
|
r386iri.inc
|
|
|
|
r386nasm.inc
|
|
|
|
r386nor.inc
|
|
|
|
r386nri.inc
|
|
|
|
r386num.inc
|
|
|
|
r386ot.inc
|
|
|
|
r386rni.inc
|
|
|
|
r386sri.inc
|
|
|
|
r386stab.inc
|
|
|
|
r386std.inc
|
|
|
|
ra386att.pas
|
|
|
|
ra386int.pas
|
|
|
|
rgcpu.pas
|
|
|
|
symcpu.pas
|
|
|
0c244046a9