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aasmcpu.pas
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* remove accidently committed debug code
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2020-02-14 20:59:32 +00:00 |
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agavrgas.pas
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* LDD/STD need always an offset, resolves #33086
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2018-01-28 21:06:13 +00:00 |
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aoptcpu.pas
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* based on a patch by Christo Crause: more compiler fixes for avrtiny, resolves #36646
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2020-02-02 20:35:29 +00:00 |
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aoptcpub.pas
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- get rid of MaxOps, it is redundant with max_operands
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2018-11-02 21:32:29 +00:00 |
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aoptcpud.pas
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avrreg.dat
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ccpuinnr.inc
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* compilation fixed
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2020-01-19 15:55:20 +00:00 |
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cgcpu.pas
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* for avr1, do not save registers during an interrupt procedure, as it has no memory to store them
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2020-02-09 14:35:56 +00:00 |
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cpubase.pas
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+ AVR: GetDefaultZeroReg and GetDefaultTmpReg
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2020-01-19 15:55:23 +00:00 |
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cpuinfo.pas
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* patch by Christo Crause: more avr1 controllers and remove attiny28 from avr25 makefile list, resolves #36686
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2020-02-09 10:51:14 +00:00 |
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cpunode.pas
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+ implemented some AVR specific intrinsics
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2017-11-01 16:33:34 +00:00 |
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cpupara.pas
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* AVR: couple of fixes for CPUs with only 16 registers
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2020-02-14 21:27:43 +00:00 |
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cpupi.pas
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* AVR: decide after compiler if a certain subroutine is suitable for avr1, if not, replace it by sleep and warn
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2020-02-08 22:05:21 +00:00 |
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cputarg.pas
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hlcgcpu.pas
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* changed create_hlcodegen into a procvar, so that we don't have to insert
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2018-11-29 21:31:15 +00:00 |
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itcpugas.pas
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+ xch instruction for avr
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2016-11-19 19:21:09 +00:00 |
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navradd.pas
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+ AVR: GetDefaultZeroReg and GetDefaultTmpReg
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2020-01-19 15:55:23 +00:00 |
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navrcnv.pas
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navrinl.pas
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AVR: Add optimizations for sign testing, and a better Abs() implementation.
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2019-07-28 11:16:37 +00:00 |
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navrmat.pas
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* AVR: use CP ...,r1 instead of CPI ...,0 to enable all registers being used as first operand
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2020-01-20 21:14:28 +00:00 |
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navrmem.pas
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* use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler)
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2017-07-28 15:54:03 +00:00 |
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navrutil.pas
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* rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR
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2017-05-23 19:58:39 +00:00 |
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raavr.pas
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* max_operands needs only to be 2 on avr
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2018-11-03 10:39:58 +00:00 |
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raavrgas.pas
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* keep track of the temp position separately from the offset in references,
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2018-04-22 17:03:16 +00:00 |
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ravrcon.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrdwa.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrnor.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrnum.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrrni.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrsri.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrsta.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrstd.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrsup.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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rgcpu.pas
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+ AVR: initial support for the avrtiny architecture
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2020-01-19 15:55:24 +00:00 |
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symcpu.pas
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