Jonas Maebe 4cd6f59bc3 * changed create_hlcodegen into a procvar, so that we don't have to insert ... hlcgllvm in the uses clause of every unit that calls create_hlcodegen o prevents dependency cycles that can cause llvm codegen units to init before the cpu variants, which is bad since the llvm versions have to override the cpu variants in their init code (+ added checks in the init code that they are in fact initialised later) git-svn-id: branches/debug_eh@40410 -		2018-11-29 21:31:15 +00:00
..
aoptcpu.pas	+ factored out TX86AsmOptimizer.PrePeepholeOptIMUL, used now by x86-64 and i386	2018-11-01 20:49:20 +00:00
aoptcpub.pas	- get rid of MaxOps, it is redundant with max_operands	2018-11-02 21:32:29 +00:00
aoptcpud.pas
cgcpu.pas	* forgotten part of r39750	2018-09-13 20:20:40 +00:00
cpubase.inc	* replaced the saved_XXX_registers arrays with virtual methods inside	2018-04-19 21:22:16 +00:00
cpuelf.pas	+ added support for x86_64-android target.	2018-10-17 16:56:27 +00:00
cpuinfo.pas	+ implementation of the vectorcall calling convention by J. Gareth Moreton	2018-02-11 17:50:37 +00:00
cpunode.pas
cpupara.pas	* Commented out unused "size" local var.	2018-11-02 18:47:34 +00:00
cpupi.pas	* forgotten part of r39750	2018-09-13 20:20:40 +00:00
cputarg.pas	+ added support for x86_64-android target.	2018-10-17 16:56:27 +00:00
hlcgcpu.pas	* changed create_hlcodegen into a procvar, so that we don't have to insert	2018-11-29 21:31:15 +00:00
nx64add.pas
nx64cal.pas
nx64cnv.pas
nx64flw.pas	* moved finalization of code generator temps to a node, so it can be getcopy'd	2018-11-17 22:38:36 +00:00
nx64inl.pas
nx64mat.pas	+ support mmx shifting	2018-02-27 21:40:12 +00:00
nx64set.pas	* keep track of the temp position separately from the offset in references,	2018-04-22 17:03:16 +00:00
r8664ari.inc
r8664att.inc
r8664con.inc	* fix flag subregs after r38206	2018-03-11 20:30:11 +00:00
r8664dwrf.inc
r8664int.inc
r8664iri.inc
r8664nasm.inc
r8664nor.inc
r8664num.inc	* fix flag subregs after r38206	2018-03-11 20:30:11 +00:00
r8664ot.inc
r8664rni.inc
r8664sri.inc
r8664stab.inc
r8664std.inc
rax64att.pas	* fix .seh_savereg: the offset is checked with a bitmask, not a divisor, so use "and", not "mod"	2018-10-07 12:25:09 +00:00
rax64int.pas	+ (slightly) patch by Emelyanov Roman to add support of SEH directive in FPC internal assembler with INTEL syntax, resolves #29894	2018-02-24 16:14:08 +00:00
rgcpu.pas
symcpu.pas
win64unw.pas
x8664ats.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00
x8664att.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00
x8664int.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00
x8664nop.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00
x8664op.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00
x8664pro.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00
x8664tab.inc	+ patch by J. Gareth Moreton to support BMI2 instructions	2018-10-07 10:10:19 +00:00