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aasmcpu.pas
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* patch by Christo Crause: more descriptive error message when BRxx destination out of reach
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2018-02-25 15:31:17 +00:00 |
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agavrgas.pas
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* LDD/STD need always an offset, resolves #33086
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2018-01-28 21:06:13 +00:00 |
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aoptcpu.pas
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* fix register allocation for MovOp2Op and PushPushPopPop2MovMov
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2018-03-10 21:53:55 +00:00 |
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aoptcpub.pas
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Added some peephole optimizations, and fixed generic unconditional jump optimizations, for AVR.
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2015-06-13 12:25:11 +00:00 |
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aoptcpud.pas
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avrreg.dat
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ccpuinnr.inc
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+ implemented some AVR specific intrinsics
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2017-11-01 16:33:34 +00:00 |
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cgcpu.pas
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* removed temppos field again from parameter locations: they're not allocated
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2018-04-27 19:18:55 +00:00 |
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cpubase.pas
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* replaced the saved_XXX_registers arrays with virtual methods inside
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2018-04-19 21:22:16 +00:00 |
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cpuinfo.pas
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* patch by Christo Crause: the subarch type for atmega 8, 8A, 16 & 32 was incorrect. Atmega8A was also listed under the wrong subarch type in the makefile, also fixed.
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2018-02-18 10:54:59 +00:00 |
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cpunode.pas
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+ implemented some AVR specific intrinsics
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2017-11-01 16:33:34 +00:00 |
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cpupara.pas
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* support marking defs created via the getreusable*() class methods as
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2015-11-04 20:46:18 +00:00 |
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cpupi.pas
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* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
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2016-12-16 22:41:21 +00:00 |
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cputarg.pas
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hlcgcpu.pas
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* moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because
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2014-08-19 20:22:54 +00:00 |
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itcpugas.pas
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+ xch instruction for avr
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2016-11-19 19:21:09 +00:00 |
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navradd.pas
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* GetNextReg(), used by 16-bit and 8-bit code generators (i8086 and avr) moved
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2017-09-11 14:53:06 +00:00 |
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navrcnv.pas
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* named class properly
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2015-04-09 20:36:47 +00:00 |
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navrinl.pas
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+ implemented some AVR specific intrinsics
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2017-11-01 16:33:34 +00:00 |
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navrmat.pas
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* missing skiplabel added, resolves #33423
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2018-03-13 18:45:32 +00:00 |
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navrmem.pas
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* use unique internalerror instead of copying that from ncgmem (though it should never happen that both occur at once in a AVR compiler)
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2017-07-28 15:54:03 +00:00 |
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navrutil.pas
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* rework InsertInitFinalTable a bit more so that the list of init/fini entries does not need to be generated twice for AVR
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2017-05-23 19:58:39 +00:00 |
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raavr.pas
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* patch by Christo Crause to support ~ in att assembler
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2018-02-22 20:14:56 +00:00 |
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raavrgas.pas
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* keep track of the temp position separately from the offset in references,
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2018-04-22 17:03:16 +00:00 |
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ravrcon.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrdwa.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrnor.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrnum.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrrni.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrsri.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrsta.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrstd.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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ravrsup.inc
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* keep the names of X, Y and Z in assembler files, fixes issue #32150
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2017-07-23 19:24:45 +00:00 |
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rgcpu.pas
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* keep track of the temp position separately from the offset in references,
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2018-04-22 17:03:16 +00:00 |
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symcpu.pas
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o fixes handling of iso i/o parameters/program parameters:
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2015-05-01 20:58:31 +00:00 |
