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handle vectorfpu (floatdef->MMREG) and softfloat (floatdef->INTREG)
+ thlcg.getregisterfordef(), which uses def2regtyp() to allocate a register
appropriate to hold values of that tdef type
+ generic thlcg.location_force_reg() implementation. Note that for
low-level code generator targets it may be slightly less efficient than
the implementation in hlcg2ll (from ncgutil) because it does not play
any tricks with the register or location size, or with reference offsets,
to truncate values
git-svn-id: branches/jvmbackend@18315 -
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|---|---|---|
| .. | ||
| aasmcpu.pas | ||
| cgcpu.pas | ||
| cpubase.pas | ||
| cpuinfo.pas | ||
| cpunode.pas | ||
| cpupara.pas | ||
| cpupi.pas | ||
| cputarg.pas | ||
| hlcgcpu.pas | ||
| itcpujas.pas | ||
| jvmreg.dat | ||
| rjvmcon.inc | ||
| rjvmnor.inc | ||
| rjvmnum.inc | ||
| rjvmrni.inc | ||
| rjvmsri.inc | ||
| rjvmstd.inc | ||
| rjvmsup.inc | ||
| tgcpu.pas | ||