florian 9ba3b12eaa * RiscV: unify push_addr_param		2024-12-25 23:33:11 +01:00
..
aoptcpu.pas
aoptcpub.pas
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas	* Risc-V: make use of sext.h instruction if available	2024-08-15 21:53:04 +02:00
cpuinfo.pas	+ more RiscV extensions	2024-11-17 15:05:35 +01:00
cpunode.pas	Add insert_init_final_table method	2024-05-25 17:26:15 +00:00
cpupara.pas	* RiscV: unify push_addr_param	2024-12-25 23:33:11 +01:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
nrv32add.pas
nrv32cal.pas
nrv32cnv.pas
nrv32mat.pas	+ Risc-V 32: optimize QWord(1) shl ...	2024-07-28 21:17:25 +02:00
nrv32util.pas	* fixes RiscV32 building	2024-12-25 22:48:40 +01:00
rrv32con.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32dwa.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32nor.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32num.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32rni.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32sri.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32sta.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32std.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
rrv32sup.inc	+ RiscV: vector registers	2024-12-25 10:34:46 +01:00
symcpu.pas
tripletcpu.pas