fpc/compiler/sparc
sergei e6a9bfdc1d * SPARC, g_concatcopy and g_concatcopy_unaligned: removed strange (probably long outdated) comments and unnecessary operations.
* g_concatcopy: avoid taking address of references if possible.

git-svn-id: trunk@26281 -
2013-12-25 10:45:25 +00:00
..
aasmcpu.pas
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
cgcpu.pas * SPARC, g_concatcopy and g_concatcopy_unaligned: removed strange (probably long outdated) comments and unnecessary operations. 2013-12-25 10:45:25 +00:00
cpubase.pas Implement support for saving and restoring address registers. 2013-10-05 21:43:42 +00:00
cpuelf.pas
cpugas.pas + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00
cpuinfo.pas
cpunode.pas
cpupara.pas * add a tdef to each parameter location and set it for all target 2013-06-02 10:24:02 +00:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
ncpuadd.pas * fixed size of temporary register used to evaluate smallset<=/>=smallset 2013-10-27 17:34:59 +00:00
ncpucall.pas
ncpucnv.pas * SPARC: convert from int64/qword to float using genmath helpers. Removes dependency on softfloat code. 2013-12-22 14:02:34 +00:00
ncpuinln.pas
ncpumat.pas * SPARC: removed 32 bit shift code, and adjusted 64-bit shifts to take advantage of 3-address instructions (a port of r26142 for MIPS) 2013-12-22 14:09:24 +00:00
ncpuset.pas
opcode.inc + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00
racpu.pas
racpugas.pas
rgcpu.pas
rspcon.inc
rspdwrf.inc
rspnor.inc
rspnum.inc
rsprni.inc
rspsri.inc
rspstab.inc
rspstd.inc
rspsup.inc
spreg.dat
strinst.inc + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 2013-12-21 16:27:24 +00:00